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參數(shù)資料
| 型號(hào)： | PI74SSTV16857AEX |
| 廠商： | Pericom |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC REGIST BUFF 14BIT DDR 48TSSOP |
| 產(chǎn)品變化通告： | Product Discontinuation 25/Apr/2012 |
| 標(biāo)準(zhǔn)包裝： | 1,500 |
| 系列： | 74SSTV |
| 邏輯類型： | DDR 的寄存緩沖器 |
| 電源電壓： | 2.3 V ~ 2.7 V |
| 位數(shù)： | 14 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TFSOP（0.240"，6.10mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 48-TSSOP |
| 包裝： | 帶卷 (TR) |
1
PS8460H
11/10/08
Product Description
Pericom Semiconductor’s PI74SSTV16857 series of logic circuits
are produced using the Company’s advanced 0.35 micron CMOS
technology, achieving industry leading speed.
The 14-bit PI74SSTV16857 universal bus driver is designed
for 2.3V to 2.7V VDD operation and SSTL_2 I/O Levels except for
the RESET input which is LVCMOS.
Data flow from D to Q is controlled by the differential clock , CLK,
CLK and RESET. Data is triggered on the positive edge of CLK.
CLK must be used to maintain noise margins.
RESET must be supported with LVCMOS levels as VREF may not
be stable during power-up. RESET is asynchronous and is intended
for power-up only and when low assures that all of the registers reset
to the Low State, Q outputs are low, and all input receivers, data and
clock, are switched off.
Pericom’s PI74SSTV16857 is characterized for operation from
0° to 70°C.
Product Features
PI74 SSTV16857 is designed for low-voltage operation,
VDD= VDDQ = 2.3V to 2.7V
Supports SSTL_2 Class I and II specifications
SSTL_2 Input and Output Levels
Designed for DDR Memory
Flow-Through Architecture
Packaging:
– 48-pin, 240-mil wide plastic TSSOP (A)
– 48-pin, 240-mil wide Lead-Free plastic TSSOP (AE)
Logic Block Diagram
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
PI74SSTV16857
14-Bit Registered Buffer
TO 13 OTHER CHANNELS
RESET
CLK
38
39
VREF
D1
48
35
D
R
CLK
Q1
1
CLK
V
34
1
2
3
4
5
6
7
8
9
48
10
47
11
46
12
45
13
44
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
32
31
30
29
28
27
26
25
Q1
Q2
GND
VDDQ
Q3
Q4
Q5
GND
VDDQ
Q6
Q7
VDDQ
GND
Q8
Q9
VDDQ
GND
Q10
Q11
Q12
VDDQ
GND
Q13
Q14
D1
D2
GND
VDD
D3
D4
D5
D6
D7
CLK
VDD
GND
VREF
RESET
D8
D9
D10
D11
D12
VDD
GND
D13
D14
ProductPinConfiguration
Pin Name
Description
RESET
Reset (Active Low)
CLK
Clock Input
CLK
Clock Input
D
Data Input
Q
Data Output
GND
Ground
VDD
Core Supply Voltage
VDDQ
Output Supply Voltage
VREF
Input Reference Voltage
Product Pin Description
08-0291
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PI74SSTVF16857AAE | IC REG BUFFER 14BIT 48TSSOP |
| PI74SSTVF16857KE | IC REG BUFFER 14BIT 48TVSOP |
| PI74SSTVF16859AE | IC REG BUFFER 13-26BIT 64-TSSOP |
| PI74SSTVF16859AZBE | IC REG BUFFER 13-26BIT 56-QFN |
| PI74STX1G02CX | IC SINGLE 2-IN NOR GATE SC70-5 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI74SSTV16859A | 制造商:Pericom Semiconductor Corporation 功能描述:Registered Buffer Single 13-CH CMOS 64-Pin TSSOP Tube |
| PI74SSTV16859AE | 制造商:Pericom Semiconductor Corporation 功能描述:Registered Buffer Single 13-CH CMOS 64-Pin TSSOP Tube 制造商:Pericom Semiconductor Corporation 功能描述:13 to 26 Bit 2.3 to 2.7 V 2.8 ns Surface Mount Registered Buffer - TSSOP-64 |
| PI74SSTV16859AX | 制造商:Pericom Semiconductor Corporation 功能描述:Registered Buffer Single 13-CH CMOS 64-Pin TSSOP T/R |
| PI74SSTV32852NB | 制造商:Pericom Semiconductor Corporation 功能描述:Registered Buffer Single 24-CH CMOS 114-Pin LFBGA Tube |
| PI74SSTV32852NBE | 制造商:Pericom Semiconductor Corporation 功能描述:Registered Buffer Single 24-CH CMOS 114-Pin LFBGA Tube |
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