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參數(shù)資料
| 型號(hào)： | PI74AVC16821 |
| 廠商： | Pericom Semiconductor Corp. |
| 英文描述： | GROUND PLATE |
| 中文描述： | 2.5V的20位總線(xiàn)接口觸發(fā)器具有三態(tài)輸出 |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大?。?/td> | 519K |
| 代理商： | PI74AVC16821 |
1
PS8548 07/31/01
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Flip-Flop with 3-State Outputs
Logic Block Diagram
Product Features
PI74AVC
+
16821 is designed for low-voltage operation,
V
CC
= 1.65V to 3.6V
True ±24mA Balanced Drive @ 3.3V
I
OFF
supports partial power-down operation
3.6V I/O Tolerant Inputs and Outputs
All outputs contain a patented DDC
(Dynamic Drive Control) circuit that reduces noise
without degrading propagation delay
Industrial operation: 40°C to +85°C
Available Packages:
56-pin 240 mil wide plastic TSSOP (A)
56-pin 173 mil wide plastic TVSOP (K)
Description
Pericom Semiconductors PI74AVC+ series of logic circuits are
produced using the Companys advanced submicron CMOS
technology, achieving industry leading speed.
The PI74AVC+ 16821is a 20-bit bus interface flip-flop designed for
1.65V to 3.6V V
CC
operation. It can be used as two 10-bit flip-flops
or one 20-bit flip-flop. The 20 flip-flops are edge-triggered D-type
flip-flops. On the positive transition of the clock (CLK) input, the
device provides true data at the Q outputs.
A buffered output-enable (OE) input can be used to place the ten
outputs in either a normal logic state (HIGH or LOW level) or a high-
impedance state. In the high-impedance state, the outputs neither
load nor drive the bus lines significantly. The high-impedance state
and increased drive provide the capacity to drive bus lines without
the need for interface or pullup components.
OE does not affect the internal operation of the flip-flops. Old data
can be retained or new data can be entered while the outputs are in
the high-impedance state.
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pullup resistor; the
minimum value of the resistor is determined by the current sinking
capability of the driver.
1
OE
C
1
1
D
1CLK
TO 9 OTHER CHANNELS
1D
1
1
Q
1
1
56
55
2
One of Ten
Channels
2
OE
C
1
1
D
2CLK
TO 9 OTHER CHANNELS
2D
1
2Q
1
28
29
42
15
One of Ten
Channels
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PI74AVC16834 | 18-Bit Universal Bus Driver with 3-State Outputs |
| PI74AVC16835 | 18-Bit Universal Bus Driver with 3-State Outputs |
| PI74AVC16835K | 18-Bit Universal Bus Driver with 3-State Outputs |
| PI74FCT138T | Fast CMOS 1-of-8 Decoder |
| PI74FCT238T | Fast CMOS 1-of-8 Decoder |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI74AVC16834 | 制造商:PERICOM 制造商全稱(chēng):Pericom Semiconductor Corporation 功能描述:18-Bit Universal Bus Driver with 3-State Outputs |
| PI74AVC16834A | 功能描述:IC UNIV BUS DVR 18BIT 56TSSOP RoHS:否 類(lèi)別:集成電路 (IC) >> 邏輯 - 通用總線(xiàn)函數(shù) 系列:74AVC 產(chǎn)品變化通告:Product Discontinuation 09/Dec/2010 標(biāo)準(zhǔn)包裝:1,500 系列:74AVC 邏輯類(lèi)型:通用總線(xiàn)驅(qū)動(dòng)器 輸入數(shù):- 電路數(shù):18 位 輸出電流高，低:12mA，12mA 電源電壓:1.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:56-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:56-TSSOP 包裝:帶卷 (TR) |
| PI74AVC16834AE | 功能描述:總線(xiàn)收發(fā)器 18B Universal Bus Driver RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| PI74AVC16834AEX | 功能描述:總線(xiàn)收發(fā)器 18B Universal Bus Driver RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| PI74AVC16834K | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:18-Bit Buffer/Driver |
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