參數(shù)資料
型號: PI74ALVC162835FD
廠商: Pericom Semiconductor Corp.
英文描述: 18-Bit Universal Bus Driver with 3-State Outputs
中文描述: 18 - 3位通用總線驅(qū)動程序態(tài)輸出
文件頁數(shù): 1/5頁
文件大?。?/td> 301K
代理商: PI74ALVC162835FD
1
PS8474 04/25/00
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Product Features
PI74ALVC162835FD is designed for low voltage operation,
V
CC
= 2.3V to 3.6V
Data inputs have clamp diodes to V
CC
Outputs have equivalent 26
series resistors
Supports PC133 Registered DIMM
Typical V
OLP
(Output Ground Bounce)
< 0.8V at V
CC
= 3.3V, T
A
= 25°C
Typical V
OHV
(Output V
OH
Undershoot)
< 2.0V at V
CC
= 3.3V, T
A
= 25°C
Industrial operation at 40°C to +85°C
Packages available:
56-pin 240 mil wide plastic TSSOP (A)
56-pin 173 mil wide plastic TVSOP (K6)
56-pin 300 mil wide plastic SSOP (V)
PI74ALVC162835FD
with 3-State Outputs
Logic Block Diagram
Product Description
Pericom Semiconductors PI74ALVC series of logic circuits
are produced using the Companys advanced 0.5 micron CMOS
technology, achieving industry leading speed.
The 18-bit PI74ALVC162835FD universal bus driver is designed
for 2.3V to 3.6V V
CC
operation.
Data flow from A to Y is controlled by Output Enable (OE).
The device operates in the transparent mode when LE is HIGH. The
A data is latched if CLK is held at a high or low logic level. If LE
is LOW, the A-bus is stored in the latch/flip-flop on the low-to-high
transition of CLK. When OE is HIGH, the outputs are in the high-
impedance state.
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
TO 17 OTHER CHANNELS
CLK
LE
A1
54
28
30
OE
27
1D
C1
CLK
Y1
3
相關(guān)PDF資料
PDF描述
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