
392
PS8137A 03/15/99
Pin Configuration
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PI6C671F
Clock Generator for Pentium Modules
Block Diagram
Description
The PI6C671F is a mixed-voltage clock generator designed to
provide all timing signals for Intel Pentium/Pentium II module-based
motherboards. It provides four CPU, seven PCI, and up to eight
SDRAM clocks. Additionally, three reference clocks (same fre-
quency as the crystal) and two selectable 24/48 MHz clocks are
available.
Pericom design improvements resulted in a low-power device
optimized for 2.5V CPU operation. A special spread-spectrum
feature may be enabled to minimize EMI.
The two-wire I
2
C serial interface can be used to reduce circuit
noise and power consumption. I
2
C control lets you enable/disable
each clock output driver, change CPU frequencies, and select 24 or
48 MHz outputs.
A power-down function (pin 44) puts the whole system in a low-
power mode by stopping the crystal oscillator and both PLLs. CPU
and PCI clocks may also be stopped by the CPU_STOP# (pin 27), and
PCI _STOP# (pin 26) functions.
Note:
Purchase of I
2
C components from Pericom conveys a license
to use them in an I
2
C system as defined by Philips.
Supports Pentium or Pentium II CPU modules
Spread Spectrum capability reduces EMI
Low power consumption
Four CPU Clocks with V
DDQ2
of 3.3V or 2.5V
Enhanced drive on CPUCLK0
Seven PCI synchronous clocks (3.3V)
One IOAPIC Clock @14.31818 MHz
(Power from pin 46), with V
DDQ1
of 3.3V or 2.5V
Two 48/24 MHz clocks (3.3V)
Six/eight SDRAM clocks (3.3V)
Three Ref. Clocks @14.31818 MHz (3.3V)
Internal crystal loading capacitor
Ref. 14.31818 MHz crystal oscillator input
Separate 66/60# MHz select pin
Separate power management MODE control pin
I
2
C 2-Wire Serial Interface
48-pin SSOP Package (V) and TSSOP (A)
Features
All trademarks are of their respective companies.
REF1
1
REF0
2
V
SS
XIN
3
4
XOUT
5
MODE
6
V
DDQ
3
7
PCICLK_F
8
PCICLK0
9
V
SS
10
PCICLK1
11
PCICLK2
12
PCICLK3
13
PCICLK4
14
V
DDQ
3
PCICLK5
15
16
V
SS
17
SEL66/60#
18
SDATA
19
SDCLK
20
V
DDQ
3
48/24MHz
21
22
48/24MHz
23
V
SS
24
V
DD
REF2
V
DDQ
1
IOAPIC0
PWR_DWN#
V
SS
CPUCLK0
CPUCLK1
V
DDQ
2
CPUCLK2
48
47
CPUCLK3
46
V
SS
SDRAM0
45
44
SDRAM1
43
V
DDQ
3
SDRAM2
42
41
SDRAM3
40
V
SS
SDRAM4
39
38
SDRAM5
37
V
DDQ
3
SDRAM6/CPU_STOP#
36
35
SDRAM7/PCI_STOP#
34
V
DD
33
32
31
30
29
28
27
26
25
48-Pin
A, V
V
DDQ
1
V
DDQ
3
V
DDQ
2
÷
2
SEL
REF
OSC
PLL1
PLL2
XOUT
XIN
4
Up to 8
6
REF0,1,2
IOAPIC0
CPUCLK0-3
SDRAM0-7
PCICLK0-5
PCICLK_F
48/24 MHz
48/24 MHz
3
Buffers