參數(shù)資料
型號(hào): PI6C410MA
廠商: Pericom Semiconductor Corp.
英文描述: Clock Generator for Intel PCI Express Mobile Chipset
中文描述: 時(shí)鐘發(fā)生器英特爾的PCI Express移動(dòng)芯片組
文件頁(yè)數(shù): 4/21頁(yè)
文件大?。?/td> 507K
代理商: PI6C410MA
4
PS8736C 12/19/05
PI6C410M/410MA
Clock Generator for Intel
PCI Express Mobile Chipset
Serial Data Interface (SMBus)
PI6C410M is a slave only SMBus device that supports indexed block read and indexed block write protocol using a single 7-bit ad-
dress and read/write bit as shown below.
Data Protocol
(1)
1 bit
Address Assignment
A6
1
A5
1
A4
0
A3
1
A2
0
A1
0
A0
1
R/W
I/0
7 bits
1
1
8 bits
1
8 bits
1
8 bits
1
8 bits
1
1 bit
Start
bit
Slave Addr
R/W
Ack
Register
offset
Ack
Byte
Count
= N
Ack
Data
Byte 0
Ack
Data
Byte N
- 1
Ack
Stop
bit
Note:
1
Register offset for indicating the starting register for indexed block write and indexed block read. Byte Count in write mode cannot be 0.
Data Byte 0: Control Register
Bit
Descriptions
Type
Power Up
Condition
Output(s) Affected
Pin
Source
Pin
0
SRC_0 Output Enable
1 = Enabled, 0 = Disabled (Hi-Z)
SRC_1 Output Enable
1 = Enabled, 0 = Disabled (Hi-Z)
SRC_2 Output Enable
1 = Enabled, 0 = Disabled (Hi-Z)
SRC_3 Output Enable
1 = Enabled, 0 = Disabled (Hi-Z)
SRC_4 Output Enable
1 = Enabled, 0 = Disabled (Hi-Z)
SRC_5 Output Enable
1 = Enabled, 0 = Disabled (Hi-Z)
SRC_6 Output Enable
1 = Enabled, 0 = Disabled (Hi-Z)
CPU_2 / SRC_7 Output Enable
1 = Enabled, 0 = Disabled (Hi-Z)
RW
1 = Enabled
SRC_0
17, 18
NA
1
RW
1 = Enabled
SRC_1
19, 20
NA
2
RW
1 = Enabled
SRC_2
22, 23
NA
3
RW
1 = Enabled
SRC_3
24, 25
NA
4
RW
1 = Enabled
SRC_4
26, 27
NA
5
RW
1 = Enabled
SRC_5
30, 31
NA
6
RW
1 = Enabled
SRC_6
32, 33
NA
7
RW
1 = Enabled
CPU_2 / SRC_7
35, 36
NA
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