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參數(shù)資料
| 型號(hào)： | PI6C2516 |
| 廠商： | Pericom Semiconductor Corp. |
| 英文描述： | Phase-Locked Loop Clock Driver with 16 Clock Outputs |
| 中文描述： | 鎖相環(huán)時(shí)鐘驅(qū)動(dòng)器，帶有16個(gè)時(shí)鐘輸出 |
| 文件頁(yè)數(shù)： | 5/7頁(yè) |
| 文件大?。?/td> | 298K |
| 代理商： | PI6C2516 |
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PI6C2516
Phase-Locked Loop Clock Driver
5
PS8440C 07/24/01
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Switching Characteristics
(Over Recommended Ranges of Supply Voltage and Operating Free-Air Temperature, C
L
= 22pF)
(1,3)
Notes:
1. These parameters are not production tested.
2. The t
sk(O)
specification is only valid for equal loading of all outputs.
3. The specifications for parameters in this table are applicable only after any appropriate stabilization time has elapsed.
Notes:
1. Operating Clock Frequency indicates a range over which the PLL must be able to lock, but in which it is not
required to meet the other timing parameters (used for low-speed system debug).
2. Application Clock Frequency indicates a range over which the PLL must meet all of the timing parameters.
3. Time required for the integrated PLL circuit to obtain phase lock of its feedback signal to its reference signal. For phase lock to be
obtained, a fixed-frequency, fixed-phase reference signal must be present at CLK. Until phase lock is obtained, the specifications
for propagation delay, skew, and jitter parameters given in the switching characteristics table are not applicable.
4. Frequency and loading condition should not exceed 0.85 watt power dissipation (package limitation). Please refer to Graph 1.
Timing Requirements
(Over Recommended Ranges of Supply Voltage and Operating Free-Air Temperature)
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Clock Frequency (MHz)
0
50
Load = 22pF
Load = 10pF
100
150
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250
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50
100
150
Graph 1. Dynamic Current vs. Clock Frequency
(V
CC
= 3.6V, T
A
= 25°C)
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