- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄367964 > PI6C2510-133 (Pericom Semiconductor Corp.) Low-Noise, Phase-Locked Loop Clock Driver with 10 Clock Outputs PDF資料下載
參數(shù)資料
| 型號： | PI6C2510-133 |
| 廠商： | Pericom Semiconductor Corp. |
| 英文描述： | Low-Noise, Phase-Locked Loop Clock Driver with 10 Clock Outputs |
| 中文描述： | 低噪聲，鎖相環(huán)時鐘驅(qū)動器，帶有10個時鐘輸出 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 141K |
| 代理商： | PI6C2510-133 |
1
PS8383B 09/14/04
Pin Configuration
Functional Table
Block Diagram
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
PI6C2510-133
Low-Noise, Phase-Locked Loop
Clock Driver with 10 Clock Outputs
Description
The PI6C2510-133 is a “quiet,” low-skew, low-jitter, phase-locked
loop (PLL) clock driver, distributing high-frequency clock signals
for SDRAM and server applications. By connecting the feedback
FB_OUT output to the feedback FB_IN input, the propagation
delay from the CLK_IN input to any clock output will be nearly zero.
This zero-delay feature allows the CLK_IN input clock to be
distributed, providing one clock input to one bank of ten outputs,
with an output enable.
This clock driver is designed to meet the PC133 SDRAM Registered
DIMM specification. For test purposes, the PLL can be bypassed
by strapping AV
CC
to ground.
Features
Operating Frequency up to 150 MHz
Low-Noise Phase-Locked Loop Clock Distribution that
meets 133 MHz Registered DIMM Synchronous DRAM
modules for server/workstation/PC applications
Allows Clock Input to have Spread Spectrum modulation
for EMI reduction
Zero Input-to-Output delay: Distribute one Clock Input
to one Bank of Ten outputs, with an output enable.
Low jitter: Cycle-to-Cycle jitter ±75ps max.
On-chip series damping resistor at clock output drivers
for low noise and EMI reduction
Operates at 3.3V V
CC
Packaging(Pb-free & Green available):
- 24-pin TSSOP (L)
s
p
n
I
s
p
O
G
]
Y
T
U
O
_
B
F
L
L
N
I
K
L
C
H
N
I
K
L
C
N
I
K
L
C
G
10
CLK_IN
FB_IN
PLL
AVcc
FB_OUT
Y[0:9]
CLK_IN
AV
CC
V
CC
Y9
Y8
GND
GND
Y7
Y6
Y5
V
CC
FB_IN
AGND
V
CC
Y0
Y1
Y2
GND
GND
Y3
Y4
V
CC
G
FB_OUT
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
24-Pin
L
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PI6C2516 | Phase-Locked Loop Clock Driver with 16 Clock Outputs |
| PI6C2516A | Phase-Locked Loop Clock Driver with 16 Clock Outputs |
| PI6C2972 | Low Voltage PLL Clock Driver |
| PI6C2972FC | Low Voltage PLL Clock Driver |
| PI6C2972FCE | Low Voltage PLL Clock Driver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI6C2510-133E | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:Low-Noise, Phase-Locked Loop Clock Driver with 10 Clock Outputs |
| PI6C2510-133EL | 制造商:Pericom Semiconductor Corporation 功能描述:Zero Delay PLL Clock Driver Single Up to 150MHz 24-Pin TSSOP Tube |
| PI6C2510-133ELE | 功能描述:鎖相環(huán) - PLL 1:9 Zero Delay Clock Driver RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| PI6C2510-133ELEX | 功能描述:鎖相環(huán) - PLL 1:9 Zero Delay Clock Driver RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| PI6C2510-133ELX | 制造商:Pericom Semiconductor Corporation 功能描述:Zero Delay PLL Clock Driver Single Up to 150MHz 24-Pin TSSOP T/R |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。