參數(shù)資料
型號: PI6C2501AWE
廠商: Pericom
文件頁數(shù): 1/4頁
文件大小: 0K
描述: IC PLL CLOCK DRIVER 8-SOIC
產(chǎn)品變化通告: Product Discontinuation 23/May/2008
標(biāo)準(zhǔn)包裝: 97
類型: PLL 時鐘驅(qū)動器
PLL: 帶旁路
輸入: CMOS
輸出: CMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:1
差分 - 輸入:輸出: 無/無
頻率 - 最大: 134MHz
除法器/乘法器: 無/無
電源電壓: 3 V ~ 3.6 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 管件
1
PS8499A
09/19/05
ProductPinConfiguration
Logic Block Diagram
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PI6C2501A
Phase-Locked Loop Clock Driver
Product Features
High-Performance,Phase-Locked-LoopClockDriverandzero-
delay buffer
Allows Clock Input to have Spread Spectrum modulation
for EMI reduction
Zero Input-to-Output delay
Lowjitter:Cycle-to-Cyclejitter±75psmax.
On-chip series damping resistor at clock output drivers
for low noise and EMI reduction
Operates at 3.3V VCC
Wide range of Clock Frequencies 80 to 134 MHz
Package:Plastic8-pin150-milSOIC(W)
Plastic 8-pin 150-mil SOIC (WE) Pb-free
Product Description
The PI6C2501A features a low-skew, low-jitter, phase-locked loop
(PLL) clock driver. By connecting the CLK_OUT output to the
feedback FB_IN input, the propagation delay from the CLK_IN
input to CLK_OUT output will be nearly zero.
Application
If a system designer needs more than 16 outputs with the features
just described, using two or more zero-delay buffers, such as the
PI6C2509Q, or PI6C2510Q, is likely to be impractical. The
device-to-device skew introduced can significantly reduce the
performance. Pericom recommends using a zero-delay buffer and
an eighteen output non-zero-delay buffer. As shown in Figure 1,
this combination produces a zero-delay buffer with all the signal
characteristics of the original zero-delay buffer, but with as many
outputs as the non-zero-delay buffer part. For example, when
combined with an eighteen output non-zero delay buffer, a system
designer can create a seventeen-output zero-delay buffer.
Figure 1. This Combination Provides Zero-Delay Between
the Reference Clock Signal and 17 Outputs
17
Zero Delay
Buffer
PI6C2501
Reference
Clock
Signal
Feedback
CLK_OUT
18 Outputs
Non-PLL
Buffer
V
C
1
2
3
VCC
4
CLK_OUT
CLK_IN
GND
FB_IN
8
7
6
5
AGND
GND
AVCC
8-Pin
W
CLK_IN
FB_IN
PLL
AVCC
CLK_OUT
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PI6C2501AWEX 功能描述:鎖相環(huán) - PLL 1 Output Zero Delay Clk Buffer RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
PI6C2501W 制造商:Pericom Semiconductor Corporation 功能描述:Zero Delay PLL Clock Driver Single 25MHz to 80MHz 8-Pin SOIC
PI6C2501WE 功能描述:鎖相環(huán) - PLL 3.3v PLL Clock Drivr RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
PI6C2501WEX 功能描述:鎖相環(huán) - PLL 3.3v PLL Clock Drivr RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
PI6C2502 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:Phase-Locked Loop Clock Driver