參數(shù)資料
型號: PI6C2408-1WE
廠商: Pericom
文件頁數(shù): 7/10頁
文件大小: 0K
描述: IC 4+4 0-DELAY CLK BUFF 16-SOIC
標(biāo)準(zhǔn)包裝: 48
類型: 零延遲緩沖器
PLL: 帶旁路
輸入: TTL
輸出: TTL
電路數(shù): 1
比率 - 輸入:輸出: 1:8
差分 - 輸入:輸出: 無/無
頻率 - 最大: 140MHz
除法器/乘法器: 無/無
電源電壓: 3 V ~ 3.6 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 管件
6
www.pericom.com
PS8589L
04/30/10
PI6C2408
3.3V 4+4 Ouptut Zero-delay Clock Driver
DC Electrical Characteristics for Commercial Temperature Devices
Parameter
Description
Test Conditions
Min. Max. Units
VIL
Input LOW Voltage
0.8
V
VIH
Input HIGH Voltage
2.0
IIL
Input LOW Current
VIN = 0V
50
mA
IIH
Input HIGH Current
VIN = VDD
100
VOL
Output LOW Voltage
IOL = 8mA (–1, –2, –3,–4, –6); IOL = 12mA (–1H)
0.4
V
VOH
Output HIGH Voltage
IOH = –8mA (–1, –2, –3,–4, –6); IOH = –12mA (–1H)
2.4
IDD
(PD mode)
Power Down Supply Current
SEL1 = 0 (-1,-2,-3,-4,-1H); SEL2 = 0 (-6)
12
mA
IDD
Supply Current
Unloaded outputs, 66.67 MHz, Select inputs at VDD or GND
39
mA
IDD
Supply Current
Unloaded outputs 100 MHz Select Inputs @ VDDor GND
54
AC Electrial Characteristics for Commercial Temperature Device
Param-
eter
Name
Test Conditions
Min. Typ. Max. Units
FO
Output Frequency
30pF load
10
100
MHz
15pF load
140
tDC
Duty Cycle(1) (–1H)
Measured at VDD/2, for high drive output
45
50
55
%
Duty Cycle (–1, –2, –3, –4, –6)
Measured at VDD/2, for normal drive output
40
50
60
tR
Rise Time(1) @30pF
Measured between 0.8V and 2.0V
2.5
ns
Rise Time(1) @15pF
Measured between 0.8V and 2.0V
1.8
Rise Time(1) @30pF (–1H)
Measured between 0.8V and 2.0V
1.5
tF
Fall Time(1) @30pF
Measured between 0.8V and 2.0V
2.2
Fall Time(1) @15pF
Measured between 0.8V and 2.0V
1.5
Fall Time(1) @30pF (–1H)
Measured between 0.8V and 2.0V
1.25
tSK(O)
Output-to-Output Skew(1) within same bank All outputs equally loaded, VDD/2
250
ps
Output Bank A to Output Bank B Skew
All outputs equally loaded, VDD/2
400
t0
Input-to-Output Delay, CLKIN
Rising Edge to FB_IN Rising Edge(1)
Measured at VDD/2
900
tSK(D)
Device to Device Skew(1)
Measured at VDD/2 on FB_IN pins of devices
0
500
tSLEW
Output Slew Rate(1)
Measured between 0.8V and 2.0V on –1H device
using Test Circuit #2
1
V/ns
tJIT
Cycle-to-Cycle Jitter (1) (–1,–1H,–4)
Measured at 66.67 MHz, loaded 30pF output
250
ps
Measured at 140 MHz, loaded 15pF output
150
Cycle-to-Cycle Jitter(1) (–2,–3,–6)
Measured at 66.7 MHz, loaded 30pF output
400
tLOCK
PLL Lock Time(1)
Stable power supply, valid clocks presented on
CLKIN and FB_IN pins
1.0
ms
Notes:
1. See Switching Waveforms on page 7.
11-0005
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