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參數(shù)資料
| 型號： | PI5C6801CQ |
| 英文描述： | Bus Switch |
| 中文描述： | 總線開關(guān) |
| 文件頁數(shù)： | 3/5頁 |
| 文件大?。?/td> | 320K |
| 代理商： | PI5C6801CQ |
3
PS8351B 05/02/00
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PI5C6800C
10-Bit BusSwitch with Precharged
Outputs for Live Insertion
Switching Characteristics
(Over Recommended Operating Free-air Temperature Range, C
L
= 50pF)
Notes:
1. This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the
typical on-state resistance of the switch and a load capacitance of 50pF, when driven by an ideal voltage source (zero
output impedance).
Parameter Measurements
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Notes:
1. C
L
includes probe and jig capacitance.
2. Waveform 1 is for an output with internal conditions such that the output is LOW except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is HIGH except when disabled by the output control.
3. All input pulses are supplied by generators having the following characteristics: PRR<10MHz, Z
o
= 50
, t
r
≤
2.5ns, t
f
≤
2.5ns.
4. The outputs are measured one at a time with one transition per measurement.
5. t
PLZ
and t
PHZ
are the same as t
dis
.
6. t
PZL
and t
PZH
are the same as t
en
.
7. t
PLH
and t
PHL
are the same as t
pd
.
t
PZL
Output
Control
(Low Level
Enabling)
0V
1.5V
1.5V
1.5V
1.5V
t
PLZ
t
PHZ
V
OL
3.5V
0V
t
PZH
+0.3V
-0.3V
Output
Waveform 1
S1 at 6V
(see Note 2)
Output
Waveform 2
S1 at Open
(see Note 2)
V
OH
V
OH
V
OL
3V
t
T
1
S
d
p
n
e
p
O
t
Z
L
P
t
L
Z
P
V
7
t
Z
H
P
t
H
Z
P
n
e
p
O
7V
Open
GND
S1
LOAD CIRCUIT
From Output
Under Test
CL = 50pF
(See note 1)
r
e
m
a
a
P
s
o
n
o
C
t
T
)
p
n
I
m
o
F
)
p
O
(
o
T
V
C
C
V
5
±
V
5
=
V
C
C
V
4
=
s
U
.
M
.
a
M
.
M
.
a
M
t
D
P
B
r
A
A
r
B
5
2
5
2
s
t
H
Z
P
D
N
G
=
V
S
A
I
B
N
O
B
r
A
1
5
6
t
L
Z
P
V
3
=
V
S
A
I
B
6
5
6
t
Z
H
P
D
N
G
=
V
S
A
I
B
N
O
B
r
A
7
5
5
t
Z
L
P
V
3
=
V
S
A
I
B
3
5
5
Input
t
PLH
t
PHL
3V
1.5V
1.5V
1.5V
1.5V
0V
Output
V
OH
V
OL
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