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參數(shù)資料
| 型號(hào)： | PI4ULS5V102UEX |
| 廠(chǎng)商： | Pericom |
| 文件頁(yè)數(shù)： | 1/12頁(yè) |
| 文件大小： | 0K |
| 描述： | IC LOGIC TRANSLATOR |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | ULS |
| 邏輯功能： | 電平移位器，雙向，3 態(tài) |
| 位數(shù)： | 2 |
| 輸入類(lèi)型： | 電壓 |
| 輸出類(lèi)型： | 電壓 |
| 數(shù)據(jù)速率： | 100Mbps |
| 通道數(shù)： | 2 |
| 輸出/通道數(shù)目： | 1 |
| 差分 - 輸入:輸出： | 無(wú)/無(wú) |
| 傳輸延遲（最大）： | 4ns |
| 電源電壓： | 1.2 V ~ 3.6 V，1.65 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-MSOP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱(chēng)： | PI4ULS5V102UEXDKR |
PI4ULS5V102
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2-Bit Universal Bi-directional Level Shifter
with Automatic Direction Control & Advance Package Solution
12-12-0003
PT0334-3
12/18/12
1
Features
1.2V to 3.6V on A Port and 1.65V to 5.5V on B Port
(VCCA ≤ VCCB)
V
CC Isolation Feature – If Either VCC Input Is at
GND, All Outputs Are in the High-Impedance State
OE Input Circuit Referenced to V
CCA
Low Power Consumption, 5 μA Max I
CC
I
off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100mA Per JESD
78, Class II
ESD Protection Exceeds JESD 22
A Port
2500-V Human-Body Model (A114-F)
200-V Machine Model (A115-A)
1500-V Charged-Device Model (C101D)
B Port
15-kV Human-Body Model (A114-F)
200-V Machine Model (A115-A)
1500-V Charged-Device Model (C101D)
Description
This 2-bit non-inverting translator uses two separate
configurable power-supply rails. The A port is designed
to track VCCA. VCCA accepts any supply voltage from
1.2V to 3.6V. The B port is designed to track VCCB. VCCB
accepts any supply voltage from 1.65V to 5.5V. This
allows for universal low-voltage bidirectional translation
between any of the 1.2V, 1.5V, 1.8V, 2.5V, 3.3V, and
5V voltage nodes. VCCA should not exceed VCCB.
When the output-enable (OE) input is low, all outputs
are placed in the high-impedance state.
This device is fully specified for partial-power-down
applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through
the device when it is powered down.
To ensure the high-impedance state during power up or
power down, OE should be tied to GND through a pull-
down resistor; the minimum value of the resistor is
determined by the current-sourcing capability of the
driver.
Pin Assignment
A
B
C
D
2
1
CSP-8 (Bottom View)
1
2
D
A2
A1
C
VCCA
OE
B
GND
VCCB
A
B2
B1
Function Block Diagram
OE
B2
B1
A2
A1
Channel 2
Channel 1
Pin Description
Pin Name
Description
B1, B2
Input/output B. Referenced to VCCB.
GND
Ground.
VCCA
A port supply voltage. 1.2 V ≤V
CCA≤ 3.6 V and
VCCA≤VCCB.
A1, A2
Input/output A. Referenced to VCCA.
OE
3-State output. Pull OE low to place all outputs in
3-state mode. Referenced to VCCA.
VCCB
B port supply voltage. 1.65 V ≤V
CCB≤ 5.5 V.
MSOP-8 (Top View)
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