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參數(shù)資料
| 型號： | PHW35NQ20T |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | JFETs |
| 英文描述： | N-channel TrenchMOS transistor(N溝道 TrenchMOS晶體管) |
| 中文描述： | 35 A, 200 V, 0.07 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-247 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 93K |
| 代理商： | PHW35NQ20T |
Philips Semiconductors
Product specification
N-channel TrenchMOS
transistor
PHW35NQ20T
FEATURES
SYMBOL
QUICK REFERENCE DATA
’Trench’
technology
Very low on-state resistance
Fast switching
Low thermal resistance
V
DSS
= 200 V
I
D
= 35 A
R
DS(ON)
≤
70 m
GENERAL DESCRIPTION
PINNING
SOT429 (TO247)
N-channel
field-effect power transistor in a
plastic envelope using ’
trench
’
technology. The device has very
low
on-state
resistance.
intended for use in dc to dc
converters and general purpose
switching applications.
enhancement
mode
PIN
DESCRIPTION
1
gate
It
is
2
drain
3
source
tab
drain
The PHW35NQ20T is supplied in
the SOT429 (TO247) conventional
leaded package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
V
DSS
Drain-source voltage
V
DGR
Drain-gate voltage
V
GS
Gate-source voltage
I
D
Continuous drain current
CONDITIONS
T
j
= 25 C to 175C
T
j
= 25 C to 175C; R
GS
= 20 k
MIN.
-
-
-
-
-
-
-
- 55
MAX.
200
200
±
20
35
25
140
250
175
UNIT
V
V
V
A
A
A
W
C
T
mb
= 25 C
T
mb
= 100 C
T
mb
= 25 C
T
mb
= 25 C
I
DM
P
D
T
j
, T
stg
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
E
AS
Non-repetitive avalanche
energy
CONDITIONS
Unclamped inductive load, I
= 35 A;
t
p
= 100
μ
s; T
j
prior to avalanche = 25C;
V
≤
50 V; R
GS
= 50
; V
GS
= 10 V; refer
to fig:15
MIN.
-
MAX.
462
UNIT
mJ
I
AS
Non-repetitive avalanche
current
-
35
A
d
g
s
2
3
1
August 1999
1
Rev 1.000
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