參數(shù)資料
型號(hào): PEF24902H
英文描述: ?Quad ISDN Echocancellation Circuit Analog Front End - 2B1Q/4B3T Code?
中文描述: ?四整體數(shù)位服務(wù)網(wǎng)路Echocancellation電路模擬前端- 2B1Q/4B3T代碼?
文件頁(yè)數(shù): 31/73頁(yè)
文件大?。?/td> 1618K
代理商: PEF24902H
PEB 2466
PEF 2466
Operational Description
Hardware Reference Manual
22
2001-02-20
4.2.12
Single Frequency Distortion
Any resulting signal with a frequency different from the test input signal will stay at least
28 dB below the input signal level.
4.2.13
Overload Compression
This is measured with a 1014 Hz sine-wave signal. The overload point in μ-Law Mode is
at 3.17 dBm0.
Figure 12
Overload Compression (μ
-
Law Coding, Transmit Direction)
4.2.14
Crosstalk
Table 17
Crosstalk Between Channels
Test Input Signal
Receive Direction
Transmit Direction
Frequency Range
300 Hz to 3.4kHz
0 Hz to 12 kHz
max. Input Level
0 dBm0
0 dBm0
Parameter
Symbol
Limit Values
min.
typ.
85
Unit
Test Conditions
max.
80
Crosstalk, 0dBm0
CT
dB
f =
200 Hz to 3400 Hz,
any combination of
directions and channels
0
Fundamental Input Power
-1
F
0
1
2
3
4
5
6
7
8
dBm0
10
0.25
-0.25
1
2
3
4
5
6
7
dBm0
9
O
2466_213
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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