參數(shù)資料
型號： PEF24901H
英文描述： ?Quad ISDN Echocancellation Circuit Digital Front-End for 4B3T Line Code?
中文描述： ？四整體數(shù)位服務(wù)網(wǎng)路Echocancellation電路數(shù)字前端4B3T線路碼的終結(jié)？
文件頁數(shù)： 8/73頁
文件大?。?/td> 1618K
代理商： PEF24901H
PEB 2466
PEF 2466
List of Figures
Page
Hardware Reference Manual
2001-02-20
Figure 1
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Figure 28
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Figure 31
Figure 32
Figure 33
Figure 34
Figure 35
SICOFI
4-μC Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
SICOFI
4-μC Logic Symbol. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Configuration of SICOFI
4-μC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
SICOFI
4-μC Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
SICOFI
4-μC State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Analog and PCM Signal Levels in A-Law Mode . . . . . . . . . . . . . . . . . 15
Analog and PCM Signal Levels in μ-Law Mode. . . . . . . . . . . . . . . . . . 15
Simplified Signal Flow Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Total Distortion Measured with Sine-Wave, Receive and Transmit. . . 20
Total Distortion Receive (Noise) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Total Distortion Transmit (Noise) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Overload Compression (μ-Law Coding, Transmit Direction) . . . . . . . . 22
Out-of-Band Discrimination in Transmit Direction . . . . . . . . . . . . . . . . 23
Analog Output: Out-of-Band Signals . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Analog Output: Out-of-Band Idle Channel Noise. . . . . . . . . . . . . . . . . 25
Analog Interface to Four Subscriber Line Interface Circuits (SLICs) . . 28
PCM Interface Example: Location of Time Slots . . . . . . . . . . . . . . . . . 31
PCM Interface Example: Detail A . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Signaling Example: Four Subscriber Lines . . . . . . . . . . . . . . . . . . . . . 33
Serial Microcontroller Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Example for a Two-Byte Write Access. . . . . . . . . . . . . . . . . . . . . . . . . 36
Example for a One-Byte Read Access . . . . . . . . . . . . . . . . . . . . . . . . 37
Example for a Read Access with Byte-by-Byte Transfer . . . . . . . . . . . 37
Bi-Directional Data Signal: DIN and DOUT Strapped Together. . . . . . 38
Channel-Specific and Common Coefficients . . . . . . . . . . . . . . . . . . . . 41
Development System with STUT 2466 Evaluation Board . . . . . . . . . . 43
SICOFI
4-μC Test Circuit Configuration . . . . . . . . . . . . . . . . . . . . . . . 44
Proposal for a ground concept. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
PCM Interface Timing in Single Clocking Mode. . . . . . . . . . . . . . . . . . 49
PCM Interface Timing in Double Clocking Mode . . . . . . . . . . . . . . . . . 50
Timing of the Microcontroller Interface. . . . . . . . . . . . . . . . . . . . . . . . . 51
Signaling Output Timing (data downstream) . . . . . . . . . . . . . . . . . . . . 52
Analog Loops. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Digital Loops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Cut-Off
’
s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
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