參數(shù)資料
型號： PEB2265
廠商： SIEMENS AG
元件分類： Codec
英文描述： Two Channel Codec Filter with IOM㈢-2 Interface (IOM㈢-2 - SICOFI㈢-2)
中文描述： 雙信道編解碼器與國際移民組織㈢-2接口（移徙㈢-2 - SICOFI㈢-2）
文件頁數(shù)： 42/77頁
文件大?。?/td> 851K
代理商： PEB2265
PEB 2265
Programming the IOM
-2 – SICOFI
-2
Semiconductor Group
42
1997-07-01
If any voltage is applied to any input-pin before initial application of
V
DD
, the
IOM-2 – SICOFI-2 may not enter the basic setting mode. In this case it is necessary to
reset the IOM-2 – SICOFI-2 or to initialize the IOM-2 – SICOFI-2 configuration registers
to ‘0’. The IOM-2 – SICOFI-2 leaves this mode automatically with the beginning of the
next 8-kHz frame (RESET-pin is released).
3.8.2
After releasing the RESET-pin, (RESET-state), beginning with the next 8 kHz frame, the
IOM-2 – SICOFI-2 will enter the Standby mode. The IOM-2 – SICOFI-2 is forced to
standby mode with the PWRUP bit set to ‘0’ in the SOP command (POWERDOWN). The
two channels must be programmed separately. During standby mode the serial
IOM-2 – SICOFI-2 IOM-2 interface is ready to receive and transmit commands and data.
Received voice data on DD-pin will be ignored. IOM-2 – SICOFI-2 configuration
registers and coefficient RAM can be loaded and read back in this mode. Data
downstream C/I-channel data is fed to appropriate command pins. Data on indication
pins is transmitted data upstream.
Standby Mode
3.8.3
The operating mode for any of the two channels is entered upon recognition of a PWRUP
bit set to ‘1’ in a SOP command for the specific channel.
Operating Mode
Table 6
CR1 … CR4
XR1 … XR4
Coefficient RAM
Command Stack
DD-input
DU-output
VOUT1,2
SBx_y
SOx_y
00
H
00
H
Not defined
Cleared
Ignored
High impedance
GNDA1,2
Input
GNDD
Table 7
IOM-2 Voice Channels
VOUT1, 2
‘11111111’ (idle)
GNDA1, 2
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