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參數(shù)資料
| 型號： | PDU16F-8 |
| 英文描述： | Programmable Delay Line |
| 中文描述： | 可編程延遲線 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大?。?/td> | 57K |
| 代理商： | PDU16F-8 |
PDU16F
Doc #97004
1/13/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
3
DEVICE SPECIFICATIONS
TABLE 1: AC CHARACTERISTICS
PARAMETER
SYMBOL
TD
T
TD
0
T
SKEW
T
DISO
T
AENS
T
AIS
T
ENIS
T
OAX
T
DISH
PER
IN
PER
IN
PER
IN
PW
IN
PW
IN
PW
IN
MIN
TYP
63
9.0
1.5
6.0
UNITS
T
INC
ns
ns
ns
ns
ns
ns
Total Programmable Delay
Inherent Delay
Output Skew
Disable to Output Low Delay
Address to Enable Setup Time
Address to Input Setup Time
Enable to Input Setup Time
Output to Address Change
Disable Hold Time
2.0
5.0
2.5
See Text
See Text
20
40
200
10
20
100
Absolute
Suggested
Recommended
Absolute
Suggested
Recommended
% of TD
T
% of TD
T
% of TD
T
% of TD
T
% of TD
T
% of TD
T
Input Period
Input Pulse Width
TABLE 2: ABSOLUTE MAXIMUM RATINGS
PARAMETER
DC Supply Voltage
Input Pin Voltage
Storage Temperature
Lead Temperature
SYMBOL
V
CC
V
IN
T
STRG
T
LEAD
MIN
-0.3
-0.3
-55
MAX
7.0
V
DD
+0.3
150
300
UNITS
V
V
C
C
NOTES
10 sec
TABLE 3: DC ELECTRICAL CHARACTERISTICS
(0C to 70C, 4.75V to 5.25V)
PARAMETER
High Level Output Voltage
SYMBOL
V
OH
MIN
2.5
TYP
3.4
MAX
UNITS
V
NOTES
V
CC
= MIN, I
OH
= MAX
V
IH
= MIN, V
IL
= MAX
V
CC
= MIN, I
OL
= MAX
V
IH
= MIN, V
IL
= MAX
Low Level Output Voltage
V
OL
0.35
0.5
V
High Level Output Current
Low Level Output Current
High Level Input Voltage
Low Level Input Voltage
Input Clamp Voltage
Input Current at Maximum
Input Voltage
High Level Input Current
Low Level Input Current
Short-circuit Output Current
Output High Fan-out
Output Low Fan-out
I
OH
I
OL
V
IH
V
IL
V
IK
I
IHH
-1.0
20.0
mA
mA
V
V
V
mA
2.0
0.8
-1.2
0.1
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
I
IH
I
IL
I
OS
20
-0.6
-150
25
12.5
μ
A
mA
mA
Unit
Load
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
V
CC
= MAX
-60
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PDF描述 |
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| PDU16FSERIES | 6-BIT PROGRAMMABLE DELAY LINE |
| PDU53-2000MC3 | 3-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU53) |
| PDU53-2000 | 3-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU53) |
| PDU53-2000C3 | 3-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU53) |
| PDU53-2000M | 3-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU53) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PDU16F-8A4 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:6-BIT PROGRAMMABLE DELAY LINE (SERIES PDU16F) |
| PDU16F-8B4 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:6-BIT PROGRAMMABLE DELAY LINE (SERIES PDU16F) |
| PDU16F-8M | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:6-BIT PROGRAMMABLE DELAY LINE (SERIES PDU16F) |
| PDU16F-8MC4 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:6-BIT PROGRAMMABLE DELAY LINE (SERIES PDU16F) |
| PDU16FSERIES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:6-BIT PROGRAMMABLE DELAY LINE |
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