- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369990 > PDU16F-6 Programmable Delay Line PDF資料下載
參數(shù)資料
| 型號： | PDU16F-6 |
| 英文描述： | Programmable Delay Line |
| 中文描述： | 可編程延遲線 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 57K |
| 代理商： | PDU16F-6 |
PDU16F
Doc #97004
1/13/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
6-BIT PROGRAMMABLE
DELAY LINE
(SERIES PDU16F)
FEATURES
PACKAGES
Digitally programmable in 64 delay steps
Monotonic delay-versus-address variation
Two separate outputs: inverting & non-inverting
Precise and stable delays
Input & outputs fully TTL interfaced & buffered
10 T
2
L fan-out capability
Fits standard 24-pin DIP socket
Auto-insertable
FUNCTIONAL DESCRIPTION
The PDU16F-series device is a 6-bit digitally programmable delay line.
The delay, TD
A
, from the input pin (IN) to the output pins (OUT, OUT/)
depends on the address code (A5-A0) according to the following formula:
TD
A
= TD
0
+ T
INC
* A
where A is the address code, T
INC
is the incremental delay of the device,
and TD
0
is the inherent delay of the device. The incremental delay is
specified by the dash number of the device and can range from 0.5ns through 10ns, inclusively. The
enable pins (EN/) are held LOW during normal operation. These pins must always be in the same state
and may be tied together externally. When these signals are brought HIGH, OUT and OUT/ are forced
into LOW and HIGH states, respectively. The address is not latched and must remain asserted during
normal operation.
SERIES SPECIFICATIONS
Programmed delay tolerance:
5% or 1ns,
whichever is greater
Inherent delay (TD
0
):
9ns typical (OUT)
8ns typical (OUT/)
Setup time and propagation delay:
Address to input setup (T
AIS
):
Disable to output delay (T
DISO
):
6ns typ. (OUT)
Operating temperature:
0
°
to 70
°
C
Temperature coefficient:
100PPM/
°
C (excludes TD
0
)
Supply voltage V
CC
:
5VDC
±
5%
Supply current:
I
CCH
= 74ma
I
CCL
= 30ma
Minimum pulse width:
10% of total delay
5ns
1997 Data Delay Devices
data
delay
devices,
inc.
3
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
OUT/
OUT
EN/
GND
N/C
IN
N/C
GND
N/C
N/C
EN/
GND
VCC
A0
A1
A2
VCC
N/C
N/C
N/C
VCC
A3
A4
A5
PDU16F-xx
DIP
PDU16F-xxA4
Gull-Wing
PDU16F-xxB4
J-Lead
PDU16F-xxM
Military DIP
PDU16F-xxMC4
Military Gull-Wing
PIN DESCRIPTIONS
IN
OUT
OUT/ Inverted Output
A0-A5 Address Bits
EN/
Output Enable
VCC
+5 Volts
GND
Ground
Delay Line Input
Non-inverted Output
DASH NUMBER SPECIFICATIONS
Part
Number
PDU16F-.5
PDU16F-1
PDU16F-2
PDU16F-3
PDU16F-4
PDU16F-5
PDU16F-6
PDU16F-8
PDU16F-10
Incremental Delay
Per Step (ns)
.5
±
.3
1
±
.5
2
±
.5
3
±
1.0
4
±
1.0
5
±
1.0
6
±
1.0
8
±
1.0
10
±
1.5
Total Delay
Change (ns)
31.5
±
1.6
63
±
3.2
126
±
6.3
189
±
9.5
252
±
12.6
315
±
15.8
378
±
18.9
504
±
25.2
630
±
31.5
NOTE: Any dash number between .5 and 10 not
shown is also available.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PDU16F-8 | Programmable Delay Line |
| PDU16FSERIES | 6-BIT PROGRAMMABLE DELAY LINE |
| PDU53-2000MC3 | 3-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU53) |
| PDU53-2000 | 3-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU53) |
| PDU53-2000C3 | 3-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU53) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PDU16F-6A4 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:6-BIT PROGRAMMABLE DELAY LINE (SERIES PDU16F) |
| PDU16F-6B4 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:6-BIT PROGRAMMABLE DELAY LINE (SERIES PDU16F) |
| PDU16F-6M | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:6-BIT PROGRAMMABLE DELAY LINE (SERIES PDU16F) |
| PDU16F-6MC4 | 制造商:DATADELAY 制造商全稱:Data Delay Devices, Inc. 功能描述:6-BIT PROGRAMMABLE DELAY LINE (SERIES PDU16F) |
| PDU16F-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Programmable Delay Line |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。