- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄367871 > PDSP1601ABOAC (ZARLINK SEMICONDUCTOR INC) ALU and Barrel Shifter PDF資料下載
參數(shù)資料
| 型號： | PDSP1601ABOAC |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 位片處理器 |
| 英文描述： | ALU and Barrel Shifter |
| 中文描述： | 16-BIT, BIT-SLICE MICROPROCESSOR, CPGA84 |
| 封裝： | PGA-84 |
| 文件頁數(shù)： | 7/16頁 |
| 文件大?。?/td> | 128K |
| 代理商： | PDSP1601ABOAC |
PDSP1601/PDSP1601A
7
SV3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
SV2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
SV1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
SV0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Shift
No shift
1 place
2 places
3 places
4 places
5 places
6 places
7 places
8 places
9 places
10 places
11 places
12 places
13 places
14 places
15 places
(1)
place the 4 bit value in either of the R1 or R2 registers and
output the value on the SV port (if enabled by
SVOE
).
Priority encode the 16 bit input to the Barrel Shifter and
(2)
Priority Encoder such that the output from the Barrel Shifter is
a normalised value.
Shift the 16 bit input by the amount indicated by the
SV Input
If the SV port is selected as the source of the shift value,
then the input to the Barrel Shifter is shifted by the value stored
in the internal SV register.
SVOE
The SV port acts as an input or an output depending upon
the IS0-3 instruction. If the user does not wish to use the
normalise instructions, then the SV port mat be forced to be
input only by typing
SVOE
control high. In this mode the SV
port may be considered an extension of the instruction inputs.
R1 and R2 Registers
The R1 and R2 registers may be loaded from the Priority
Encoder (NRMR1 and NRMR2) or from the SV input (LR1SV,
LR2SV).
Whilst the latter two instructions are executing, the Barrel
Shifter will pass its input to the output unshifted.
Priority Encoder
If the priority encoder is selected as the source of the shift
value (instructions:- NRMXX, NRMR1, MRMRZ), then within
one 100ns cycle or two 50ns cycles for the PDSP1601A (one
200ns or two 100ns cycles for the PDSP1601), the shift
circuitry will:
Table 3 Barrel shifter codes
R1
MUX
R2
MUX
MUX
4
16
PRIORITY ENCODER
INSTRUCTION
DECODE
4
4
IS0-3
SV
SVOE
Fig.3 Shift control block
相關PDF資料 |
PDF描述 |
|---|---|
| PDSP16116A | 16 by 16 Bit Complex Multiplier |
| PDSP16116AMC | 16 by 16 Bit Complex Multiplier |
| PDSP16116AMCAC1R | 16 by 16 Bit Complex Multiplier |
| PDSP16116AMCGC1R | 16 by 16 Bit Complex Multiplier |
| PDSP16116MC | 16 by 16 Bit Complex Multiplier |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PDSP1601AC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| PDSP1601AC0/AC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fixed Point ALU |
| PDSP1601ALC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| PDSP1601B0/AC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fixed Point ALU |
| PDSP1601B0/LC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fixed Point ALU |
發(fā)布緊急采購，3分鐘左右您將得到回復。