PD064VX1
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Page:7
CN 2
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Symbol
VSS2
V1
V2
V3
V4
V5
V6
V7
VSS2
V8
V9
V10
V11
V12
V13
V14
VSS2
VDD2
VCOM
XON
OE
U/D
CKV
STVU
STVD
VGG
GND
VCC
GND
VEE
I/O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I/O
I/O
I
I
I
I
I
Function
Remark
Note 5-10
Note 5-10
Note 5-10
Note 5-10
Note 5-10
Note 5-10
Note 5-10
Note 5-10
Note 5-10
Note 5-10
Note 5-10
Note 5-10
Note 5-10
Note 5-10
Note 5-10
Note 5-5
Note 5-6
Note 5-7
Note 5-6
Note 5-6
Note 5-8
Note 5-12
Note 5-9
Ground
Gamma Voltage 1
Gamma Voltage 2
Gamma Voltage 3
Gamma Voltage 4
Gamma Voltage 5
Gamma Voltage 6
Gamma Voltage 7
Ground
Gamma Voltage 8
Gamma Voltage 9
Gamma Voltage 10
Gamma Voltage 11
Gamma Voltage 12
Gamma Voltage 13
Gamma Voltage 14
Ground
Voltage for analog circuit
Common Voltage
NC
Output Enable
Up / Down Selection
Vertical Shift Clock
Vertical Shift Pulse Signal Input or Output
Vertical Shift Pulse Signal Input or Output
Gate On Voltage
Ground
Voltage for logic circuit
Ground
Gate Off Voltage
Note 5-1: Select left or right shift
R/L
1
0
Note 5-2: Latch the polarity of outputs and switch the new data to outputs
At the rising edge (LD), latch the “POL” signal to control the polarity of the outputs.
Note 5-3: Control whether the Data R0~G5 are inverted or not. (PVI suggests connecting to GND)
When “REV=1”, these data will be inverted.
EX: “00””3F”, “07”
”38”, “15”
”2A”
Note 5-4: Polarity selector for dot-inversion control. Available at the rising edge of LD.
When POL=1: Even outputs range from V1~V7, and Odd outputs range from V8~V14;
When POL=0: Even outputs range from V8~V14, and Odd outputs range from V1~V7.
Note 5-5: When OE is connected to high “1”, the driver outputs are disabled (Gate output = V
EE
).
Under this condition, the operation of registers will not be affected.
DIO1
Input
Hi-Z
DIO2
Hi-Z
Input
Shift
Left to right
Right to left