SBAS452 – SEPTEMBER 2008 ......................................................................................................................................................................................... www.ti.com
TERMINAL FUNCTIONS (continued)
TERMINAL
PULL-
5-V
NAME
PIN
I/O
DOWN
TOLERANT
DESCRIPTION
Output data for SPI(2), address select 1 for I2C, mode select 1 for
MDO/ADR1/MD1
44
I/O
No
hardware control mode
Chip select for SPI, address select 0 for I2C, mode select 0 for
MS/ADR0/MD0
45
I
Yes
hardware control mode
VDD1
46
—
No
Digital power supply 1, +3.3 V
DGND1
47
—
No
Digital ground 1
Control port mode selection. Tied to VDD: SPI, pull-up: H/W
MODE
48
I
No
single-ended input, pull-down: H/W and differential input, tied to
DGND: I2C
VCCAD1
49
—
No
ADC analog power supply 1, +5 V
AGNDAD1
50
—
No
Analog ground 1 for ADC
VIN1–
51
I
No
Negative analog input to ADC1
VIN1+
52
I
No
Positive analog input to ADC1
VIN2–
53
I
No
Negative analog input to ADC2
VIN2+
54
I
No
Positive analog input to ADC2
VIN3–
55
I
No
Negative analog input to ADC3
VIN3+
56
I
No
Positive analog input to ADC3
VIN4–
57
I
No
Negative analog input to ADC4
VIN4+
58
I
No
Positive analog input to ADC4
VREFAD1
59
—
No
ADC analog reference voltage 1 decoupling
VREFAD2
60
—
No
ADC analog reference voltage 2 decoupling
VIN5–
61
I
No
Negative analog input to ADC5
VIN5+
62
I
No
Positive analog input to ADC5
VIN6–
63
I
No
Negative analog input to ADC6
VIN6+
64
I
No
Positive analog input to ADC6
(2)
3-state (Hi-Z) operation in SPI.
10
Copyright 2008, Texas Instruments Incorporated