參數(shù)資料
型號: PCM1792DBG4
廠商: Texas Instruments
文件頁數(shù): 27/61頁
文件大?。?/td> 0K
描述: IC DAC 24BIT STER 192KHZ 28-SSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Basics
標(biāo)準(zhǔn)包裝: 47
位數(shù): 24
數(shù)據(jù)接口: I²C,串行,SPI?
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
工作溫度: -25°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 28-SSOP
包裝: 管件
輸出數(shù)目和類型: 2 電壓,單極
采樣率(每秒): 200k
PCM1792
SLES069B MARCH 2003 REVISED NOVEMBER 2006
www.ti.com
33
ZFGx: Zero-Detection Flag
Where x = L or R, corresponding to the DAC output channel. These bits are available only for readback.
Default value: 00
ZFGx = 0
Not zero
ZFGx = 1
Zero detected
These bits show zero conditions. Their status is the same as that of the zero flags at ZEROL (pin 1) and ZEROR
(pin 2). See Zero Detect in the FUNCTION DESCRIPTIONS section.
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
Register 23
R
0
1
0
1
RSV
ID4
ID3
ID2
ID1
ID0
R: Read Mode Select
Value is always 1, specifying the readback mode.
ID[4:0]: Device ID
The ID[4:0] bits hold a device ID in the TDMCA mode.
TYPICAL CONNECTION DIAGRAM IN PCM MODE
DATA
24
23
22
21
20
19
18
17
16
15
5
6
7
8
9
10
11
12
13
14
PCM1792
BCK
SCK
DGND
VDD
MS
MDI
MC
MDO
RST
AGND2
IOUTR
VCC1
VCOML
VCOMR
IREF
IOUTR+
AGND3R
AGND1
+
ZEROL
1
2
3
4
ZEROR
MSEL
LRCK
28
27
26
25
VCC2L
AGND3L
IOUTL
IOUTL+
VOUT
L-Channel
5 V
VCC2R
0.1
F
Controller
10
F
3.3 V
PCM
Audio
Data
Source
0.1
F
10
F
Cf
Rf
Differential
to
Single
Converter
With
Low-Pass
Filter
+
47
F
47
F
5 V
10
F
10 k
+
Cf
Rf
+
VOUT
R-Channel
Cf
Rf
Differential
to
Single
Converter
With
Low-Pass
Filter
+
Cf
Rf
0.1
F
10
F
5 V
+
Figure 35. Typical Application Circuit for Standard PCM Audio Operation
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