參數(shù)資料
型號： PCM1792ADBR
英文描述： 24-bit,192-khz sampling,advanced segment, audio stereo digital-to-analog converter
中文描述： 24位,192 - kHz的采樣，先進的部分，立體聲音頻數(shù)字模擬轉(zhuǎn)換器
文件頁數(shù)： 51/59頁
文件大?。?/td> 500K
代理商： PCM1792ADBR
SLES105B FEBRUARY 2004 REVISED NOVEMBER 2006
www.ti.com
51
Audio Fields
The audio field is 32 bits in length and the audio data is transferred MSB first, so the other fields must be stuffed
with 0s as shown in the following example.
31 16 12 8
7 4 3 0
audio data
MSB 24 bits LSB
All 0s
TDMCA Register Requirements
TDMCA mode requires device ID and audio channel information, previously described. The OPE bit in register
19 indicates audio channel availability and register 23 indicates the device ID. Register 23 is used only in the
TDMCA mode. See the mode control register map (Table 4).
Register Write/Read Operation
The command supports register write and read operations. If the command requests to read one register, the
read data is transferred on DO during the data phase of the timing cycle. The DI signal can be retrieved at the
positive edge of BCK, and the DO signal is driven at the negative edge of BCK. DO is activated one BCK cycle
early to compensate for the output delay caused by high impedance. Figure 60 shows the TDMCA write and
read timing.
BCK
DI
DO
DOEN
(Internal)
1 BCK Early
Read Mode and Proper Register ID
Read Data Driven, if Read Mode
Register ID Phase
Data Phase
Write Data Retrieved, if Write Mode
Figure 60. TDMCA Write and Read Operation Timing
TDMCA-Mode Operation
DCO specifies the owner of the next audio channel in TDMCA-mode operation. When a device retrieves its own
audio channel data, DCO goes HIGH during the last audio channel period. Figure 61 shows the DCO output
timing in TDMCA-mode operation. The host controller ignores the behavior of DCI and DCO. DCO indicates
the last audio channel of each device. Therefore, DCI means the next audio channel is allocated.
If some devices are skipped due to no active audio channel, the skipped devices must notify the next device
that the DCO will be passed through the next DCI. Figure 62 and Figure 63 show DCO timing with skip
operation. Figure 64 shows the ac timing of the daisy-chain signals.
相關(guān)PDF資料
PDF描述
PCM1794ADB 24-bit,192-khz sampling,advanced segment, audio stereo digital-to-analog converter
PCM1794ADBR 24-bit,192-khz sampling,advanced segment, audio stereo digital-to-analog converter
PCM1794A 24-bit,192-khz sampling,advanced segment, audio stereo digital-to-analog converter
PCM1794ADBRG4 24-bit,192-khz sampling,advanced segment, audio stereo digital-to-analog converter
PCM1794ADBG4 24-bit,192-khz sampling,advanced segment, audio stereo digital-to-analog converter
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PCM1792ADBRG4 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24B 192kHz Sampling Adv Seg Aud St DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
PCM1792DB 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 192kHz Smplng Adv Stg Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
PCM1792DB 制造商:Texas Instruments 功能描述:24BIT AUDIO DAC SMD 1792 SSOP28
PCM1792DBG4 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 192kHz Smplng Adv Stg Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
PCM1792DBR 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 24-Bit 192kHz Smplng Adv Stg Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
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