Remote 16-bit I/O expander for I2
參數(shù)資料
型號: PCF8575TS/1,118
廠商: NXP Semiconductors
文件頁數(shù): 7/24頁
文件大?。?/td> 0K
描述: IC I/O EXPANDER I2C 16B 24SSOP
產(chǎn)品培訓(xùn)模塊: I²C Bus Fundamentals
特色產(chǎn)品: NXP - I2C Interface
標(biāo)準(zhǔn)包裝: 1
接口: I²C
輸入/輸出數(shù): 16
中斷輸出:
頻率 - 時鐘: 400kHz
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 24-SSOP
包裝: 標(biāo)準(zhǔn)包裝
包括: POR
產(chǎn)品目錄頁面: 827 (CN2011-ZH PDF)
其它名稱: 568-1079-6
1999 Apr 07
15
Philips Semiconductors
Product specication
Remote 16-bit I/O expander for I2C-bus
PCF8575
11 I2C-BUS TIMING CHARACTERISTICS
See Fig.13 and note 1.
Notes
1. All the timing values are valid within the operating supply voltage and ambient temperature range and refer to VIL
and VIH with an input voltage swing of VSS to VDD.
2. The device inputs SDA and SCL are filtered and will reject spikes on the bus lines of widths less than tSW(max).
3. The rise and fall times specified here refer to the driver device (PCF8575) and are part of the general fast I2C-bus
specification when PCF8575 asserts an acknowledge on SDA, the minimum fall time is 20 ns + 0.1Cb.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
fSCL
SCL clock frequency
400
kHz
tSW
tolerable spike width on bus
note 2
50
ns
tBUF
BUS free time between a STOP
and START condition
1.3
s
tSU;STA
START condition set-up time
0.6
s
tHD;STA
START condition hold time
0.6
s
tLOW
SCL LOW time
1.3
s
tHIGH
SCL HIGH time
0.6
s
tr
SCL and SDA rise time
note 3
20 + 0.1Cb
300
ns
tf
SCL and SDA fall time
note 3
20 + 0.1Cb
300
ns
tSU;DAT
data set-up time
100
ns
tHD;DAT
data hold time
0
ns
tSU;STO
STOP condition set-up time
0.6
s
Cb
capacitive load represented by
each bus line
400
pF
Fig.13 I2C-bus timing diagram.
handbook, full pagewidth
PROTOCOL
SCL
SDA
MGL546
BIT 0
LSB
(R/W)
tSU;STA
tSU;DAT
tSU;STO
tHD;STA
tHD;DAT
tBUF
tr
tf
tLOW
tHIGH
1/fSCL
START
CONDITION
(S)
BIT 7
MSB
(A7)
BIT 6
(A6)
ACKNOWLEDGE
(A)
STOP
CONDITION
(P)
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