- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄367816 > PCF2119X-2 (NXP Semiconductors N.V.) LCD controllers/drivers PDF資料下載
參數(shù)資料
| 型號： | PCF2119X-2 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | LCD controllers/drivers |
| 中文描述： | LCD控制器/驅(qū)動器 |
| 文件頁數(shù)： | 7/60頁 |
| 文件大?。?/td> | 284K |
| 代理商： | PCF2119X-2 |
第1頁第2頁第3頁第4頁第5頁第6頁當(dāng)前第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁
28. August 2000
7
Philips Semiconductors
Product specification
LCD controllers/drivers
PCF2119x-2
7.4
Oscillator
The on-chip oscillator provides the clock signal for the
display system. No external components are required and
the OSC pad must be connected to V
DD
.
7.5
External clock
If an external clock is to be used this is input at the OSC
pad. The resulting display frame frequency is given by:
f
Only in the power-down state is the clock allowed to be
stopped (OSC connected to V
SS
), otherwise the LCD is
frozen in a DC state.
7.6
Power-on reset
The PC2119x must be reset externally. This is an internal
synchronous reset that requires 3 OSC cycles to be
executed after release of the external reset signal. If no
external reset is performed, the chip might start-up in an
unwanted state. The external reset is active high.
7.7
Power-down mode
The chip can be put into power-down mode by applying an
external active high level to the PD pad. In power-down
mode all static currents are switched off (no internal
oscillator, no bias level generation and all LCD outputs are
internally connected to V
SS
).
During power-down, information in the RAMs and the chip
state are preserved. Instruction execution during
power-down is possible when pad OSC is externally
clocked.
7.8
Registers
The PCF2119x has two 8-bit registers, an Instruction
Register (IR) and a Data Register (DR). The Register
Select signal (RS) determines which register will be
accessed. The instruction register stores instruction codes
such as ‘display clear’ and ‘cursor shift’, and address
information for the Display Data RAM (DDRAM) and
Character Generator RAM (CGRAM).
f
frame
3072
=
The instruction register can be written to but not read from
by the system controller. The data register temporarily
stores data to be read from the DDRAM and CGRAM.
When reading, data from the DDRAM or CGRAM
corresponding to the address in the instruction register is
written to the data register prior to being read by the ‘read
data’ instruction.
7.9
Busy flag
The busy flag indicates the internal status of the
PCF2119x. A logic 1 indicates that the chip is busy and
further instructions will not be accepted. The busy flag is
output to pad DB7 when RS = 0 and R/W = 1. Instructions
should only be written after checking that the busy flag is
at logic 0 or waiting for the required number of cycles.
7.10
Address Counter (AC)
The address counter assigns addresses to the DDRAM
and CGRAM for reading and writing and is set by the
commands ‘set CGRAM address’ and ‘set DDRAM
address’. After a read/write operation the address counter
is automatically incremented or decremented by 1.
The address counter contents are output to the bus
(DB6 to DB0) when RS = 0 and R/W = 1.
7.11
Display Data RAM (DDRAM)
The DDRAM stores up to 80 characters of display data
represented by 8-bit character codes. RAM locations
which are not used for storing display data can be used as
general purpose RAM. The basic RAM to display
addressing scheme is shown in Fig.2. With no display shift
the characters represented by the codes in the first
32 RAM locations starting at address 00H in line 1 are
displayed. Figures 3 and 4 show the display mapping for
right and left shift respectively.
When data is written to or read from the DDRAM
wrap-around occurs from the end of one line to the start of
the next line. When the display is shifted each line wraps
around within itself, independently of the others. Thus all
lines are shifted and wrapped around together.
The address ranges and wrap-around operations for the
various modes are shown in Table 3.
Table 3
Address space and wrap-around operation
MODE
1
×
32
00 to 4F
4F to 00
4F to 00
2
×
16
1
×
9
00 to 27
27 to 00
27 to 00
Address space
Read/write wrap-around (moves to next line)
Display shift wrap-around (stays within line)
00 to 27; 40 to 67
27 to 40; 67 to 00
27 to 00; 67 to 40
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PCF2128 | Integrated RTC / TCXO / Crystal |
| PCF2128T | Integrated RTC / TCXO / Crystal |
| PCF2128T1 | Integrated RTC / TCXO / Crystal |
| PCF35N08 | Multi-Color LED; LED Color:Yellow/Green; Luminous Intensity:16mcd; Viewing Angle:120 ; Forward Current:30mA; Forward Voltage:2.1V; Operating Temperature Range:-55 C to ? C; Color:Yellow/Green; Input Current:20mA RoHS Compliant: No |
| PCF5001 | POCSAG Paging Decoder |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCF2120 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Quartz oscillator |
| PCF2120TK | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Quartz oscillator |
| PCF2120TK/1,118 | 功能描述:標(biāo)準(zhǔn)時鐘振蕩器 Quartz oscillator RoHS:否 制造商:AVX 產(chǎn)品:Standard Clock Oscillators 封裝 / 箱體:7 mm x 5 mm 頻率:75 MHz 頻率穩(wěn)定性:50 PPM 電源電壓:2.5 V 負(fù)載電容: 端接類型:SMD/SMT 最小工作溫度:0 C 最大工作溫度:+ 70 C 輸出格式:LVDS 尺寸: 封裝:Reel 系列: |
| PCF2120TK/1118 | 制造商:Rochester Electronics LLC 功能描述: 制造商:NXP Semiconductors 功能描述: |
| PCF2120U | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Quartz oscillator |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。