1
2
P
P
L
P
Table 3
Instructions (note 1)
Notes
1.
In the I
2
C-bus mode the DL bit is don't care. 8-bit mode is assumed.
In the I
2
C-bus mode a control byte is required when RS or R/W is changed; control byte: Co, RS, R/W, 0, 0, 0, 0, 0; command byte: DB7 to DB0.
2.
Example: f
osc
= 150 kHz,
= 6.67
μ
s; 3 cycles = 20
μ
s, 165 cycles = 1.1 ms.
INSTRUCTION
RS
R/W
DB7 DB6 DB5
DB4 DB3 DB2 DB1 DB0
DESCRIPTION
REQUIRED
CLOCK
CYCLES
(2)
NOP
Clear display
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
No operation.
Clears entire display and sets DDRAM
address 0 in Address Counter.
Sets DDRAM address 0 in Address Counter.
Also returns shifted display to original position.
DDRAM contents remain unchanged.
Sets cursor move direction and specifies shift
of display. These operations are performed
during data write and read.
Sets entire display on/off (D), cursor on/off (C)
and blink of cursor position character (B).
Moves cursor and shifts display without
changing DDRAM contents.
Sets interface data length (DL), number of
display lines (N, M) and voltage generator
control (G).
Sets CGRAM address.
0
165
Return Home
0
0
0
0
0
0
0
0
1
0
3
Entry mode set
0
0
0
0
0
0
0
1
I/D
S
3
Display control
0
0
0
0
0
0
1
D
C
B
3
Cursor/display
shift
Function set
0
0
0
0
0
1
S/C
R/L
0
0
3
0
0
0
0
1
DL
N
M
G
0
3
Set CGRAM
address
Set DDRAM
address
Read busy flag
and address
0
0
0
1
A
CG
3
0
0
1
A
DD
Sets DDRAM address.
3
0
1
BF
A
C
Reads Busy Flag (BF) indicating internal
operation is being performed and reads
Address Counter contents.
Reads data from CGRAM or DDRAM.
Writes data to CGRAM or DDRAM.
0
Read data
Write data
1
1
1
0
read data
write data
3
3
T
cy
f
osc
--1
=