參數(shù)資料
型號: PCF2104C
廠商: NXP Semiconductors N.V.
英文描述: LCD controller/driver
中文描述: LCD控制器/驅動器
文件頁數(shù): 45/56頁
文件大?。?/td> 366K
代理商: PCF2104C
1997 Dec 16
5
Philips Semiconductors
Product specication
LCD controller/driver
PCF2104x
6
PINNING
SYMBOL
FFC PAD
TYPE
DESCRIPTION
OSC
1
I
oscillator/external clock input
VDD
2
P
logic supply voltage
SA0
3
I
I2C-bus address pin input
VSS
4
P
ground
R8 to R5
5 to 8
O
LCD row driver outputs
R32 to R29
9 to12
O
LCD row driver outputs
R24 to R17
13 to 20
O
LCD row driver outputs
C60 to C1
21 to 80
O
LCD column driver outputs
R9 to R16
81 to 88
O
LCD row driver outputs
R25 to R28
89 to 92
O
LCD row driver outputs
R1 to R4
93 to 96
O
LCD row driver outputs
SCL
97
I
I2C-bus serial clock input
E
98
I
data bus clock input
RS
99
I
register select input
R/W
100
I
read/write input
T1
101
I
test pad input
DB7 to DB0
102 to 109
I/O
8-bit bidirectional data bus input/output
SDA
110
I/O
I2C-bus serial data input/output
VLCD
111
I
LCD supply voltage input
7
PIN FUNCTIONS
7.1
RS: register select (parallel control)
RS selects the register to be accessed for read and write
when the device is controlled by the parallel interface.
RS = logic 0 selects the instruction register for write and
the Busy Flag and Address Counter for read. RS = logic 1
selects the data register for both read and write. There is
an internal pull-up on pin RS.
7.2
R/W: read/write (parallel control)
R/W selects either the read (R/W = logic 1) or write
(R/W = logic 0) operation when control is by the parallel
interface. There is an internal pull-up on this pin.
7.3
E: data bus clock (parallel control)
The E pin is set HIGH to signal the start of a read or write
operation when the device is controlled by the parallel
interface. Data is clocked in or out of the chip on the
negative edge of the clock. Note that this pin must be tied
to logic 0 (VSS) when I2C-bus control is used.
7.4
DB0 to DB7: data bus (parallel control)
The bidirectional, 3-state data bus transfers data between
the system controller and the PCF2104x. DB7 may be
used as the Busy Flag, signalling that internal operations
are not yet completed. In 4-bit operations the 4 higher
order lines DB4 to DB7 are used; DB0 to DB3 must be left
open circuit. There is an internal pull-up on each of the
data lines. Note that these pins must be left open circuit
when I2C-bus control is used.
7.5
C1 to C60: column driver outputs
These pins output the data for pairs of columns.
This arrangement permits optimized chip-on-glass (COG)
layout for 4-line by 12 characters.
7.6
R1 to R32: row driver outputs
These pins output the row select waveforms to the left and
right halves of the display.
7.7
VLCD: LCD power supply
Negative power supply for the liquid crystal display.
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