參數(shù)資料
型號(hào)： PCA9698DGG/S911,51
廠商： NXP Semiconductors
文件頁(yè)數(shù)： 47/48頁(yè)
文件大?。?/td> 0K
描述： IC I/O EXPANDER I2C 40B 56TSSOP
標(biāo)準(zhǔn)包裝： 2,000
接口： I²C
輸入/輸出數(shù)： 40
中斷輸出： 是
頻率 - 時(shí)鐘： 1MHz
電源電壓： 2.3 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 56-TFSOP（0.240"，6.10mm 寬）
供應(yīng)商設(shè)備封裝： 56-TSSOP
包裝： 帶卷 (TR)
包括： POR
其它名稱： 935285491518
PCA9698DGG/S911-T
PCA9698DGG/S911-T-ND
PCA9698
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 3 — 3 August 2010
8 of 48
NXP Semiconductors
PCA9698
40-bit Fm+ I2C-bus advanced I/O port with RESET, OE and INT
7.2 Alert response, GPIO All Call and Device ID addresses
Three other different addresses can be sent to the PCA9698.
Alert Response address: allows to perform an ‘SMBus Alert’ operation as defined in
the SMBus specification. This address is always used to perform a Read operation.
GPIO All Call address: allows to program several Advanced GPIO devices at the
same time. This address is always used to perform a Write operation. See Section 7.6
“GPIO All Call” for more information.
Device ID address: allows to read ID information from the device (manufacturer, part
identification, revision). See Section 7.5 “Device ID - PCA9698 ID field” for more
information.
7.3 Command register
Following the successful acknowledgement of the slave address + R/W bit, the bus
master will send a byte to the PCA9698, which will be stored in the Command register.
The lowest 6 bits are used as a pointer to determine which register will be accessed.
Registers are divided into 2 categories: 5-bank register category, and 1-bank register
category.
Only a command register code with the 7 least significant bits equal to the 28 allowable
values as defined in Table 3 “Register summary” will be acknowledged. Reserved or
undefined command codes will not be acknowledged. At power-up, this register defaults
to 80h, with the AI bit set to ‘1’, and the lowest 7 bits set to ‘0'.
During a write operation, the PCA9698 will acknowledge a byte sent to the OP, PI, IOC,
MSK, OUTCONF, ALLBNK, and MODE registers, but will not acknowledge a byte sent to
the IPx registers since these are read-only registers.
Fig 6.
Alert Response address
Fig 7.
GPIO All Call address
Fig 8.
Device ID address
1
002aab938
0
1
0
R/W
002aab939
1
0
1
0
R/W
002aab940
1
0
Fig 9.
Command register
0
002aab941
1
0
D0
AI
D5
D4
D3
D2
D1
register number
Auto-Increment
default at power-up
or after RESET
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