參數資料
| 型號： | PCA9672PW,118 |
| 廠商： | NXP Semiconductors |
| 文件頁數： | 7/36頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/O EXPANDER I2C 8B 16TSSOP |
| 標準包裝： | 2,500 |
| 接口： | I²C |
| 輸入/輸出數： | 8 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 1MHz |
| 電源電壓： | 2.3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 16-TSSOP |
| 包裝： | 帶卷 (TR) |
| 包括： | POR |
| 其它名稱： | 935282747118 PCA9672PW-T PCA9672PW-T-ND |
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PCA9672
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 3 — 27 May 2013
15 of 36
NXP Semiconductors
PCA9672
Remote 8-bit I/O expander for Fm+ I2C-bus with interrupt and reset
9.3 Acknowledge
The number of data bytes transferred between the START and the STOP conditions from
transmitter to receiver is not limited. Each byte of eight bits is followed by one
acknowledge bit. The acknowledge bit is an active LOW level (generated by the receiving
device) that indicates to the transmitter that the data transfer was successful.
A slave receiver which is addressed must generate an acknowledge after the reception of
each byte. Also a master must generate an acknowledge after the reception of each byte
that has been clocked out of the slave transmitter. The device that wants to issue an
acknowledge bit has to pull down the SDA line during the acknowledge clock pulse, so
that the SDA line is stable LOW during the HIGH period of the acknowledge bit related
clock pulse; set-up and hold times must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
Fig 18. System configuration
002aaa966
MASTER
TRANSMITTER/
RECEIVER
SLAVE
RECEIVER
SLAVE
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER
MASTER
TRANSMITTER/
RECEIVER
SDA
SCL
I2C-BUS
MULTIPLEXER
SLAVE
Fig 19. Acknowledgement on the I2C-bus
002aaa987
S
START
condition
9
8
2
1
clock pulse for
acknowledgement
not acknowledge
acknowledge
data output
by transmitter
data output
by receiver
SCL from master
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相關代理商/技術參數 |
參數描述 |
|---|---|
| PCA9673BQ,118 | 功能描述:接口-I/O擴展器 REMOTE 16BIT GPIO RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9673BQ-T | 功能描述:接口-I/O擴展器 REMOTE 16BIT GPIO FM+I2C-RESET RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9673BS,118 | 功能描述:接口-I/O擴展器 REMOTE 16BIT GPIO RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9673BS-T | 功能描述:接口-I/O擴展器 REMOTE 16BIT GPIO FM+I2C-RESET RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9673D | 功能描述:接口-I/O擴展器 16BIT I2C FM+ QBGPIO INT-RS PU RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
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