參數(shù)資料
型號(hào)： PCA9558
廠商： NXP Semiconductors N.V.
英文描述： 8-bit I2C and SMBus I/O port with 5-bit multiplexed/1-bit latched 6-bit I2C EEPROM and 2 k bit EEPROM
中文描述： 8位I2C和SMBus I / O與5位multiplexed/1-bit端口鎖存6位I2C EEPROM及2度位EEPROM
文件頁(yè)數(shù)： 9/18頁(yè)
文件大?。?/td> 131K
代理商： PCA9558
Philips Semiconductors
8-bit I
2
C and SMBus I/O port with 5-bit multiplexed/1-bit
latched 6-bit I
2
C EEPROM and 2 k bit EEPROM
Product data
PCA9558
2002 May 24
9
EEPROM write operation
6-bit write operation
A write operation to the 6-bit EEPROM requires that an address
byte be written after the command byte. This address points to the
6-bit address space in the EEPROM array. Upon receipt of this
address, the PCA9558 waits for the next byte that will be written to
the EEPROM. The master then ends the transaction with a STOP
condition on the I
2
C. See Figure 10.
After the STOP condition, the E/W cycle starts, and the parts will not
respond to any request to access the EEPROM array until the cycle
finishes, approximately 4 ms.
6-bit read operation
A read operation is initiated in the same manner as a write
operation, with the exception that after the word address has been
written a REPEATED START condition is placed on the I
2
C-bus and
the direction of communication is reversed (see Figure 11).
256 byte write operation (I
2
C)
A write operation to the 256 byte EEPROM requires that an address
byte be written after the command byte. This address points to the
starting address in the EEPROM array. The four LSBs of this
address select a position on a 16 byte page register, the 4 MSBs
select which page register. The four LSBs will be auto-incremented
after receipt of each byte of data; in this manner, the entire page
register can be written starting at any point. Up to 16 bytes of data
may be sent to the PCA9558, followed by a STOP condition on the
I
2
C-bus. If the master sends more than 16 bytes of data prior to
generating a STOP condition, data within the address page will be
overwritten and unpredictable results may occur. See Figure 12.
After the STOP condition, the E/W cycle starts, and the parts will not
respond to any request to access the EEPROM array until the cycle
finishes, approximately 4 ms.
256 byte read operation (I
2
C)
A read operation is initiated in the same manner as a write
operation, with the exception that after the word address has been
written, a REPEATED START condition is placed on the I
2
C-bus,
and the direction of communication is reversed. For a read
operation, the entire address is incremented after the transmission
of each byte, meaning that the entire 256 byte EEPROM array can
be read at one time. See Figure 13.
256 byte EEPROM write to GPIO
A mode is available whereby a byte of data in the 256 byte
EEPROM array can be written to the GPIO (OPR). This is initiated
by the I
2
C-bus. In this mode, a control word indicating a read from
the 256 byte EEPROM and write to the GPIO is sent, followed by
the word address of the data within the EEPROM array. Upon
ACKNOWLEDGE from the slave, the data is sent to the GPIO. See
Figure 14.
256 byte EEPROM write from GPIO
A mode is available whereby data in the GPIO (IPR) can be written
to the 256 byte EEPROM. This is initiated by the I
2
C-bus. In this
mode, a control word indicating a read from the GPIO and write to
the 256 byte EEPROM is sent, followed by the word address for the
data to be written. Once the slave sent an ACKNOWLEDGE, the
master must send a STOP condition. See Figure 15.
After the STOP condition, the E/W cycle starts, and the parts will not
respond to any request to access the EEPROM array until the cycle
finishes, approximately 4 ms.
When the Write Protect (WP) input is a logic 0 it allows writes to
both EEPROM arrays. When a logic 1, it prevents any writes to the
EEPROM arrays.
SW00640
S
1
0
0
1
1
1 A0
0
A
A
SLAVE ADDRESS
R/W
ACKNOWLEDGE
FROM SLAVE
ACKNOWLEDGE
FROM SLAVE
COMMAND BYTE
EEPROM ADDRESS
1
ACKNOWLEDGE
FROM SLAVE
DATA FOR 6bitEEPROM
0
0
0
0
0
1
0
0
1
1
1
1
1
1
1
A
X
X
d5 d4 d3 d2 d1 d0
A
P
ACKNOWLEDGE
FROM SLAVE
PROGRAMMING BEGINS AFTER STOP
Figure 10. I
2
C write of 6-bit EEPROM
SW00641
S
1
0
0
1
1
1 A0 0
A
A
SLAVE ADDRESS
R/W
ACKNOWLEDGE
FROM SLAVE
ACKNOWLEDGE
FROM SLAVE
COMMAND BYTE
EEPROM ADDRESS
1
ACKNOWLEDGE
FROM SLAVE
SLAVE ADDRESS
0
0
0
0
0
1
1
0
1
1
1
1
1
1
1 A
1
A
ACKNOWLEDGE
FROM SLAVE
DATA FROM 6bitEEPROM
0
0 d5 d4 d3 d2 d1 d0 NA P
NO ACKNOWLEDGE
FROM MASTER
S
1
0
0
1
1
1 A0
R/W
Figure 11. I
2
C read of 6-bit EEPROM
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PCA9558PW 功能描述:接口-I/O擴(kuò)展器 5BIT MP/1-BITL 6BIT I2C EEPROM RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
PCA9558PW,112 功能描述:接口-I/O擴(kuò)展器 5BIT MP/1-BITL 6BIT RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
PCA9558PW,118 功能描述:接口-I/O擴(kuò)展器 5BIT MP/1-BITL 6BIT RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
PCA9558PW-T 功能描述:接口-I/O擴(kuò)展器 5BIT MP/1-BITL 6BIT I2C EEPROM RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
PCA9559 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:5-bit multiplexed/1-bit latched 6-bit I2C EEPROM
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