參數(shù)資料
型號: PCA9555PW/DG,118
廠商: NXP Semiconductors
文件頁數(shù): 1/34頁
文件大小: 0K
描述: IC I/O EXPANDER I2C 16B 24TSSOP
標(biāo)準(zhǔn)包裝: 1
接口: I²C,SM 總線
輸入/輸出數(shù): 16
中斷輸出:
頻率 - 時鐘: 400kHz
電源電壓: 2.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 標(biāo)準(zhǔn)包裝
包括: POR
其它名稱: 568-8253-6
1.
General description
The PCA9555 is a 24-pin CMOS device that provides 16 bits of General Purpose parallel
Input/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed to
enhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvements
include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O
conguration, and smaller packaging. I/O expanders provide a simple solution when
additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.
The PCA9555 consists of two 8-bit Conguration (Input or Output selection); Input, Output
and Polarity Inversion (active HIGH or active LOW operation) registers. The system
master can enable the I/Os as either inputs or outputs by writing to the I/O conguration
bits. The data for each Input or Output is kept in the corresponding Input or Output
register. The polarity of the read register can be inverted with the Polarity Inversion
register. All registers can be read by the system master. Although pin-to-pin and I2C-bus
address compatible with the PCF8575, software changes are required due to the
enhancements, and are discussed in
Application Note AN469.
The PCA9555 open-drain interrupt output is activated when any input state differs from its
corresponding input port register state and is used to indicate to the system master that
an input state has changed. The power-on reset sets the registers to their default values
and initializes the device state machine.
Three hardware pins (A0, A1, A2) vary the xed I2C-bus address and allow up to eight
devices to share the same I2C-bus/SMBus. The xed I2C-bus address of the PCA9555 is
the same as the PCA9554, allowing up to eight of these devices in any combination to
share the same I2C-bus/SMBus.
2.
Features
I Operating power supply voltage range of 2.3 V to 5.5 V
I 5 V tolerant I/Os
I Polarity Inversion register
I Active LOW interrupt output
I Low standby current
I Noise lter on SCL/SDA inputs
I No glitch on power-up
I Internal power-on reset
I 16 I/O pins which default to 16 inputs
I 0 Hz to 400 kHz clock frequency
I ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
PCA9555
16-bit I2C-bus and SMBus I/O port with interrupt
Rev. 08 — 22 October 2009
Product data sheet
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