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| 型號： | PCA9538PW,112 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 3/34頁 |
| 文件大小： | 0K |
| 描述： | IC I/O EXPANDER I2C 8B 16TSSOP |
| 標(biāo)準(zhǔn)包裝： | 96 |
| 接口： | I²C，SM 總線 |
| 輸入/輸出數(shù)： | 8 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 400kHz |
| 電源電壓： | 2.3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP |
| 包裝： | 管件 |
| 包括： | POR |
| 其它名稱： | 935277419112 PCA9538PW PCA9538PW-ND |
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PCA9538
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 6 — 6 February 2013
11 of 34
NXP Semiconductors
PCA9538
8-bit I2C-bus and SMBus low power I/O port with interrupt and reset
Fig 9.
Read from register
A
S
START condition
R/W
acknowledge
from slave
002aae710
A
acknowledge
from slave
SDA
A
P
acknowledge
from master
DATA (first byte)
slave address
STOP
condition
S
(repeated)
START condition
(cont.)
1100
A1 A0
1
A
1
R/W
acknowledge
from slave
slave address
at this moment master-transmitter becomes master-receiver
and slave-receiver becomes slave-transmitter
NA
no acknowledge
from master
COMMAND BYTE
1100
A1 A0
1
0
data from register
DATA (last byte)
data from register
This figure assumes the command byte has previously been programmed with 00h.
Transfer of data can be stopped at any moment by a STOP condition.
Expanded diagram is shown in Figure 17.
Fig 10. Read input port register
1100
A1 A0
1
A
S1
slave address
START condition
R/W
acknowledge
from slave
002aae711
data from port
A
acknowledge
from master
SDA
NA
no acknowledge
from master
read from
port
data into
port
data from port
DATA 1
DATA 4
INT
DATA 4
DATA 2
DATA 3
P
STOP
condition
tv(INT)
trst(INT)
th(D)
tsu(D)
12345678
SCL
9
DATA 1
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