參數(shù)資料
型號(hào): PCA9512
廠商: NXP Semiconductors N.V.
英文描述: Level shifting hot swappable I2C and SMBus buffer
中文描述: 電平移動(dòng)熱插拔I2C和SMBus緩沖器
文件頁數(shù): 6/16頁
文件大?。?/td> 176K
代理商: PCA9512
Philips Semiconductors
Product data sheet
PCA9512
Level shifting hot swappable I
2
C and SMBus buffer
2004 Oct 05
6
Resistor Pull-up Value Selection
The system pull-up resistors must be strong enough to provide a
positive slew rate of 1.25 V/
μ
s on the SDA and SCL pins, in order to
activate the boost pull-up currents during rising edges. Choose
maximum resistor value using the formula:
R
(V
CC(MIN)
– 0.6) (800,000)/C
where R is the pull-up resistor value in ohms, V
CC(MIN)
is the
minimum V
CC
voltage and C is the equivalent bus capacitance in
picofarads (pF).
In addition, regardless of the bus capacitance, always choose
R
16 k
for V
CC
= 5.5 V maximum, R
24 k
for V
CC
= 3.6 V
maximum. The start-up circuitry requires logic HIGH voltages on
SDAOUT and SCLOUT to connect the backplane to the card, and
these pull-up values are needed to overcome the precharge voltage.
See the curves in Figures 5 and 6 for guidance in resistor pull-up
selection.
30
20
15
21
5
0
0
100
200
300
400
C
BUS
(pF)
R
PULLUP
25
RECOMMENDED
PULL-UP
R
MAX
= 24 k
RISE-TIME > 300 ns
SW02115
Figure 5. Bus requirements for 3.3 V systems
20
15
21
5
0
0
100
200
300
400
C
BUS
(pF)
R
PULLUP
RECOMMENDED
PULL-UP
R
MAX
= 16 k
RISE-TIME
> 300 ns
SW02116
Figure 6. Bus requirements for 5 V systems
Minimum SDA and SCL Capacitance
Requirements
The device connection circuitry requires a minimum capacitance
loading on the SDA and SCL pins in order to function properly. The
value of this capacitance is a function of V
CC
and the bus pull-up
resistance. Estimate the bus capacitance on both the backplane and
the card data and clock buses, and refer to Figures 5 and 6 to
choose appropriate pull-up resistor values. Note from the figures
that 5 V systems should have at least 47 pF capacitance on their
buses and 3.3 V systems should have at least 22 pF capacitance for
proper operation of the PCA9512. Although the device has been
designed to be marginally stable with smaller capacitance loads, for
applications with less capacitance, provisions need to be made to
add a capacitor to ground to ensure these minimum capacitance
conditions if oscillations are noticed during initial signal integrity
verification.
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