參數(shù)資料
型號(hào): PCA2002TK/1,118
廠商: NXP Semiconductors
文件頁數(shù): 30/30頁
文件大?。?/td> 0K
描述: IC WATCH CIRCUIT 10HVSON
標(biāo)準(zhǔn)包裝: 6,000
類型: 時(shí)鐘/頻率發(fā)生器
PLL:
主要目的: 電池式腕表
輸入: 晶體
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無/無
頻率 - 最大: 32kHz
電源電壓: 1.1 V ~ 3.6 V
工作溫度: -10°C ~ 60°C
安裝類型: 表面貼裝
封裝/外殼: 10-VFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 10-HVSON(3x3)
包裝: 管件
其它名稱: 935275138118
PCA2002TK-T
PCA2002TK-T-ND
PCA2002
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 8 — 25 November 2011
9 of 30
NXP Semiconductors
PCA2002
32 kHz watch circuit with programmable output period and pulse width
After the VP(prog)(start) pulse, the instruction counter is in state 1 and the data shift register
is cleared.
The instruction state ends with a second pulse to VP(prog)(stop) or with the pulse to Vstore.
In any case, the instruction states are terminated automatically 2 seconds after the last
supply modulation pulse.
8.7 Programming the memory cells
Applying the two-stage programming pulse (see Figure 5) transfers the stored data in the
shift register to the OTP cells.
Perform the following to program a memory word:
1. Starting with a VP(prog)(start) pulse, wait for the time period t0 then set the instruction
counter to the word to be written (td =t1).
2. Enter the data to be stored into the shift register (td =t2 or t3), LSB first (bit 8) and
MSB last (bit 1).
3. Applying the two-stage programming pulse Vprestore followed by Vstore stores the word.
The delay between the last data bit and the pre-store pulse Vprestore is td =t4. Store the
word by raising the supply voltage to Vstore; the delay between the last data bit and the
store pulse is td.
The example shown in Figure 5 performs the following functions:
Start
Setting the instruction counter to state 4 (word B)
Entering data word 110101 into the shift register (sequence: LSB first and MSB last)
Writing the OTP cells for word B
The example shows the programming of B = 110101 (the sequence is MSB first and LSB last).
VDD(nom): nominal supply voltage.
Fig 5.
Supply voltage modulation for programming
mgw356
VDD(nom)
VP(mod)
VDD
VSS
VP(prog)(start)
tp(start)
t0
t1 t1 t1
t3
t2
t3
t2
t3
t4
tw(store)
Vstore
Vprestore
tw(prestore)
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