
Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
MC9S12XE-Family Reference Manual , Rev. 1.07
568
Freescale Semiconductor
14.4.2.21 ICPAR — Input Control Pulse Accumulators Register (ICPAR)
Read: Anytime
Write: Anytime.
All bits reset to zero.
The 8-bit pulse accumulators PAC3 and PAC2 can be enabled only if PAEN in PACTL is cleared. If PAEN
is set, PA3EN and PA2EN have no effect.
The8-bitpulseaccumulatorsPAC1andPAC0canbeenabledonlyifPBENinPBCTLiscleared.IfPBEN
is set, PA1EN and PA0EN have no effect.
Module Base + 0x0028
7
0
6
0
5
0
4
0
3
2
1
0
R
W
PA3EN
PA2EN
PA1EN
PA0EN
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 14-43. Input Control Pulse Accumulators Register (ICPAR)
Table 14-24. ICPAR Field Descriptions
Field
Description
3:0
PA[3:0]EN
8-Bit Pulse Accumulator ‘x’ Enable
0 8-Bit Pulse Accumulator is disabled.
1 8-Bit Pulse Accumulator is enabled.