參數(shù)資料
型號(hào)： PC33926PNBR2
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 運(yùn)動(dòng)控制電子
英文描述： BRUSHLESS DC MOTOR CONTROLLER, 5 A, PQCC32
封裝： 8 X 8 MM, 2.10 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, MO-251AADDB-1, QFN-32
文件頁(yè)數(shù)： 23/25頁(yè)
文件大?。?/td> 778K
代理商： PC33926PNBR2
Analog Integrated Circuit Device Data
Freescale Semiconductor
7
33926
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics
Characteristics noted under conditions 8.0 V
≤ VPWR ≤ 28 V, -40°C ≤ TA ≤ 125°C, GND = 0 V unless otherwise noted. Typical
values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
POWER INPUTS (VPWR)
Operating Voltage Range (10)
Steady-State
Transient (t < 500 ms) (11)
Quasi-Functional (RDS(ON) May Increase by 50%)
VPWR(SS)
VPWR(t)
VPWR(QF)
8.0
–
5.0
–
28
40
8.0
V
Sleep State Supply Current (12)
EN, D2, INV, SLEW = Logic [0], IN1, IN2, D1 = Logic [1], and
IOUT = 0 A
IPWR(SLEEP)
–
50
A
Standby Supply Current (Part Enabled)
IOUT = 0 A, VEN = 5.0 V
IPWR(STANDBY)
–
20
mA
Undervoltage Lockout Thresholds
VPWR(falling)
VPWR(rising)
Hysteresis
VUVLO(ACTIVE)
VUVLO(INACTIVE)
VUVLO(HYS)
4.15
–
150
–
200
–
5.0
350
V
mV
CHARGE PUMP
Charge Pump Voltage (CP Capacitor = 33 nF)
VPWR = 5.0 V
VPWR = 28 V
VCP - VPWR
3.5
–
12
V
CONTROL INPUTS
Operating Input Voltage (EN, IN1, IN2, D1, D2, INV, SLEW)
VI
–
5.5
V
Input Voltage (IN1, IN2, D1, D2, INV, SLEW) (13)
Logic Threshold HIGH
Logic Threshold LOW
Hysteresis
VIH
VIL
VHYS
2.0
–
250
–
400
–
1.0
–
V
mV
Input Voltage (EN) Threshold
VTH
1.0
–
2.0
V
Logic Input Currents, VPWR = 8.0V
Inputs EN, D2, INV, SLEW (internal pull-downs), VIH = 5.0V
Inputs IN1, IN2, D1 (internal pull-ups), VIL = 0V
IIN
20
-200
80
-80
200
-20
A
Notes
10.
Device specifications are characterized over the range of 8.0 V
≤ VPWR ≤ 28 V. Continuous operation above 28 V may degrade device
reliability. Device is operational down to 5.0 V, but below 8.0 V the output resistance may increase by 50 percent.
11.
Device will survive the transient overvoltage indicated for a maximum duration of 500 ms. Transient not to be repeated more than once
every 10 seconds.
12.
IPWR(sleep) is with Sleep mode activated and EN, D2, INV, SLEW = logic [0], and IN1, IN2, D1 = logic [1] or with these inputs left floating.
13.
SLEW Input Voltage Hysteresis is guaranteed by design.
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