參數(shù)資料
型號(hào): PBL40215
廠商: ERICSSON
英文描述: RF Transceiver circuit for the Digital Enhanced Cordless Telecommunications (DECT) system
中文描述: RF收發(fā)器電路的數(shù)字增強(qiáng)無(wú)線電話(DECT)系統(tǒng)
文件頁(yè)數(shù): 12/22頁(yè)
文件大小: 214K
代理商: PBL40215
12
PBL 402 15
Word B.
Description.
Word B has address W0 =1. It controls modes, functionality and configuration. Word B signals are only active when CE is enabled
or EN is active.
Data address
D0
Name
SYN_EN
Default
Description
1 = Synthesiser power on.
0 = Synthesiser power off.
1 = IF receiver enabled. IF mixer + RSSI + Demodulator + Slave PLL
0 = IF receiver disabled.
1 = Receiver power on. LNA + front end mixer
0 = Receiver power off.
1 = Transmit power on.
0 = Transmit power off.
1 = Slice hold pin SHOLD, active high.
0 = Slice hold pin SHOLD, active low.
1 = Slice hold enable.
0 = Slice hold disable.
Active level on the external SHOLD pin determined by SHOLD_P will
also enable slice hold.
1 = Modulation pin MOD, active high.
0 = Modulation pin MOD, active low.
1 = Enable modulation.
0 = Disable modulation.
Active level on the external MOD pin determined by MOD_P will
also enable modulation.
1 = Modulation controlled by the SHOLD pin.
0 = Modulation controlled by the MOD pin.
The effect is to multiplex between the MOD & SHOLD pins.
1 = TX gating pin, GATE active high.
0 = TX gating pin, GATE active low.
Charge pump operation control.
00 = Normal 01 = Force CP voltage down ( =VCO frequency up )
11 = Tri-state 10 = Force CP voltage up ( =VCO frequency down )
Reserved. These bits need not to be programmed.
0
D1
IF_EN
0
D2
RX_EN
0
D3
TX_EN
0
D4
SHOLD_P
0
D5
SHOLD_EN
0
D6
MOD_P
0
D7
MOD_EN
0
D8
MOD_SW
0
D9
GATE_P
0
D10
D11
CPC0
CPC1
0
0
D12 to D23
Word B Table.
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