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參數(shù)資料
| 型號： | PALLV22V10Z-25JI |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | PLD |
| 英文描述： | Hook-Up Wire; Conductor Size AWG:18; No. Strands x Strand Size:19 x 30; Jacket Color:Red; Approval Bodies:UL; Approval Categories:UL AWM Style 1180; Passes VW-1 Flame Test; Cable/Wire MIL SPEC:MIL-W-16878/5 Type EE RoHS Compliant: Yes |
| 中文描述： | EE PLD, 25 ns, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 14/19頁 |
| 文件大小： | 380K |
| 代理商： | PALLV22V10Z-25JI |
4
PALLV22V10 and PALLV22V10Z Families
USE
GAL
DEVICES
FOR
NEW
DESIGNS
Programmable Three-State Outputs
Each output has a three-state output buffer with three-state control. A product term controls the
buffer, allowing enable and disable to be a function of any product of device inputs or output
feedback. The combinatorial output provides a bi-directional I/O pin, and may be congured as
a dedicated input if the buffer is always disabled.
Programmable Output Polarity
The polarity of each macrocell output can be active high or active low, either to match output
signal needs or to reduce product terms. Programmable polarity allows Boolean expressions to be
written in their most compact form (true or inverted), and the output can still be of the desired
polarity. It can also save “DeMorganizing” efforts.
Selection is controlled by programmable bit S0 in the output macrocell, and affects both registered
and combinatorial outputs. Selection is automatic, based on the design specication and pin
denitions. If the pin denition and output equation have the same polarity, the output is
programmed to be active high (S0 = 1).
Preset/Reset
For initialization, the PALLV22V10 has additional preset and reset product terms. These terms are
connected to all registered outputs. When the synchronous preset (SP) product term is asserted
high, the output registers will be loaded with a HIGH on the next LOW-to-HIGH clock transition.
When the asynchronous reset (AR) product term is asserted high, the output registers will be
immediately loaded with a LOW independent of the clock.
DQ
Q
CLK
SP
AR
a. Registered/active low
S0 = 0
S1 = 0
b. Combinatorial/active low
S0 = 0
S1 = 1
DQ
Q
CLK
SP
AR
c. Registered/active high
S0 = 1
S1 = 0
d. Combinatorial/active high
S0 = 1
S1 = 1
Figure 2. Macrocell Conguration Options
18956D-005
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PALLV22V10Z-25PI | Hook-Up Wire; Conductor Size AWG:18; No. Strands x Strand Size:19 x 30; Jacket Color:Orange; Approval Bodies:UL; Approval Categories:UL AWM Style 1180; Passes VW-1 Flame Test; Cable/Wire MIL SPEC:MIL-W-16878/5 Type EE RoHS Compliant: Yes |
| PAT4556C0DBAB | 0 MHz - 10000 MHz RF/MICROWAVE FIXED ATTENUATOR |
| PBRC-2.00AR | |
| PBRC4.00HR50X000 | RSNTR 4.00MHZ 33PF 0.5% CER SMD-3.4X7.4 -40+85C T&R |
| PC-SO5 | 2 ELEMENT, 10000000 uH, GENERAL PURPOSE INDUCTOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PALLV22V10Z-25PI | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device |
| PALLV22V10Z25SI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC |
| PALM-L1 | 制造商:Panduit Corp 功能描述:B-ID |
| PALM-L2 | 制造商:Panduit Corp 功能描述:B-ID |
| PALM-T1 | 制造商:Panduit Corp 功能描述:WIRE MARKER T1 PANDUIT |
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