參數(shù)資料
型號: PALCE20V8Q-20JI/4
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: EE CMOS 24-Pin Universal Programmable Array Logic
中文描述: EE PLD, 20 ns, PQCC28
封裝: PLASTIC, LCC-28
文件頁數(shù): 10/25頁
文件大?。?/td> 479K
代理商: PALCE20V8Q-20JI/4
18
PALCE20V8 Family
USE
GAL
DEVICES
FOR
NEW
DESIGNS
TYPICAL ICC CHARACTERISTICS
VCC = 5 V, TA = 25°C
ICC vs. Frequency
The selected “typical” pattern utilized 50% of the device resources. Half of the macrocells were programmed as registered, and the
other half were programmed as combinatorial. Half of the available product terms were used for each macrocell. On any vector, half
of the outputs were switching.
By utilizing 50% of the device, a midpoint is dened for ICC. From this midpoint, a designer may scale the ICC graphs up or down to
estimate the ICC requirements for a particular design.
150
125
100
75
50
25
0
010
20
30
40
50
Frequency (MHz)
I CC
(mA)
20V8H-5
20V8H-7
20V8H-10
20V8H-15/25
20V8Q-15/25
16491E-11
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相關代理商/技術參數(shù)
參數(shù)描述
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