- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369946 > PALC22V10 (Cypress Semiconductor Corp.) ECONOLINE: RSS & RSD - 1kVDC and 3KVDC Isolation- Internal SMD Construction- UL94V-0 Package Material- Toroidal Magnetics- Efficiency to 85%- SMD5, SMD8, SMD10 and SMD12 case styles PDF資料下載
參數(shù)資料
| 型號： | PALC22V10 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | ECONOLINE: RSS & RSD - 1kVDC and 3KVDC Isolation- Internal SMD Construction- UL94V-0 Package Material- Toroidal Magnetics- Efficiency to 85%- SMD5, SMD8, SMD10 and SMD12 case styles |
| 中文描述： | 可再編程的CMOS PAL制式設(shè)備 |
| 文件頁數(shù)： | 1/3頁 |
| 文件大?。?/td> | 79K |
| 代理商： | PALC22V10 |
Reprogrammable CMOS
PAL
Device
PALC22V10
This is an abbreviated data sheet. Contact a Cypress
representative for complete specifications.
USE ULTRA37000
TM
FOR
ALL NEW DESIGNS
Cypress Semiconductor Corporation
Document #: 38-03052 Rev. *A
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised April 9, 2004
Features
Advanced second-generation PAL
architecture
Low power
— 55 mA max. “L”
— 90 mA max. standard
— 120 mA max. military
CMOS EPROM technology for reprogrammability
Variable product terms
— 2 x (8 through 16) product terms
User-programmable macrocell
— Output polarity control
— Individually selectable for registered or
combinatorial operation
20, 25, 35 ns commercial and industrial
25, 30, 40 ns military
Up to 22 input terms and 10 outputs
High reliability
— Proven EPROM technology
— 100% programming and functional testing
Windowed DIP, windowed LCC, DIP, LCC, and PLCC
available
Functional Description
The Cypress PALC22V10 is a CMOS second-generation
programmable logic array device. It is implemented with the
familiar sum-of-products (AND-OR) logic structure and a
new concept, the “programmable macrocell.”
Logic Block Diagram (PDIP/CDIP)
Pin Configuration
LCC/PLCC
Top View
Macrocell
8
10
12
14
16
16
14
12
10
8
11
10
9
8
7
6
5
4
3
2
1
12
13
14
15
16
17
18
19
20
21
22
23
24
Preset
PROGRAMMABLE
AND ARRAY
(132 X 44)
I
I
I
I
I
I
I
I
I
I
CP/I
VSS
I
I/O9
I/O8
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
I/O0
VCC
Reset
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
Macrocell
5
6
7
8
9
10
11
4 3 2
282726
12131415161718
25
24
23
22
21
20
19
I/O
I/O
I/O
NC
I/O
I/O
I/O
I
I
I
I
I
I
2
3
4
5
6
7
I
9
I
I
C
V
I
I
8
I
I
V
I
I
S
0
1
C
1
N
N
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PALCE22V10 | Flash Erasable,Reprogrammable CMOS PAL Device(可擦除閃速，CMOS可重編程PAL器件) |
| PALLV16V8-10JC | Low Voltage, Zero Power 20-Pin EE CMOS Universal Programmable Array Logic |
| PALLV16V8-10PC | Low Voltage, Zero Power 20-Pin EE CMOS Universal Programmable Array Logic |
| PALLV16V8-10SC | Low Voltage, Zero Power 20-Pin EE CMOS Universal Programmable Array Logic |
| PAN4820 | On-board type DC Noise Filter for Telecom |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PALC22V10-15WC | 制造商:Cypress Semiconductor 功能描述: |
| PALC22V10-20HC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:UV-Erasable/OTP PLD |
| PALC22V10-20JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:UV-Erasable/OTP PLD |
| PALC22V10-20WC | 制造商:Cypress Semiconductor 功能描述: |
| PALC22V10-20WI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:UV-Erasable/OTP PLD |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。