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參數(shù)資料
| 型號： | PACVGA105 |
| 廠商： | California Micro Devices Corporation |
| 英文描述： | VGA Port Companion Circuit |
| 中文描述： | VGA端口伴侶電路 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大?。?/td> | 91K |
| 代理商： | PACVGA105 |
2004 California Micro Devices Corp. All rights reserved.
4
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L
Tel: 408.263.3214
L
Fax: 408.263.7846
L
www.calmicro.com
01/28/04
PACVGA105
Specifications (cont’d)
Note 1: All parameters specified over standard operating conditions unless otherwise noted.
Note 2: Measured at 1MHz. R/G/B inputs biased at 1.65V with V
RGB
= 3.3V. DDC_CLK and DDC_DATA biased at 2.5V with
V
CC
=5V. HSYNC and VSYNC inputs biased at V
AUX
or GND with V
AUX
= 3.3V and V
CC
= 5V. These parameters are guaran-
teed by design and characterization
Note 3: Per the IEC-61000-4-2 International ESD Standard, Level 4 contact discharge method. V
RGB
and V
CC
must be bypassed to
GND via a low impedance ground plane with a 0.2uF, low inductance, chip ceramic capacitor at each supply pin. ESD pulse
is applied between the applicable pins and GND. ESD pulse can be positive or negative with respect to GND. Applicable
pins are: R, G, B, HSYNC_OUT, VSYNC_OUT, DDC_CLK and DDC_DATA. The HSYNC and VSYNC inputs are ESD pro-
tected to the industry standard 2kV per the Human Body Model (MIL-STD-883, Method 3015).
Note 4: Applicable to the SYNC buffers only. Input signals swing between 0V and 3.0V, with rise and fall times
≤
5ns. Guaranteed by
correlation to buffer output drive currents.
ELECTRICAL OPERATING CHARACTERISTICS
(SEE NOTE 1)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
F
Diode Forward Voltage
I
F
= 10mA
1.0
V
V
OH
Logic High Output Voltage
I
OH
= -4mA, V
CC
= 4.5V
4.0
V
V
OL
Logic Low Output Voltage
I
OL
= 4mA, V
CC
= 4.5V
0.4
V
I
IN
Input Current
R, G and B pins
HSYNC, VSYNC pins
HSYNC, VSYNC pins
V
RGB
= 3.63V, V
IN
= V
RGB
or GND
V
AUX
= 3.63V, V
IN
= V
AUX
V
AUX
= 3.63V, V
IN
= GND
-30
-72.5
+1
+1
-95
μ
A
μ
A
μ
A
I
CC
V
CC
Supply Current
V
CC
= 5.5V; V
AUX
= V
RGB
= 2.97V; All
inputs and outputs floating
35
100
μ
A
I
RGB
V
RGB
Supply Current
R, G and B pins at V
CC
or GND; All
inputs and outputs floating
10
μ
A
C
IN
Input Capacitance
R, G and B pins
HSYNC, VSYNC pins
DDC_DATA, DDC_CLK pins
Note 2 applies for all cases
5
10
5
pF
pF
pF
R
PU
Pull-up Resistance
DDC_DATA, DDC_CLK pins
1.62
1.8
1.98
k
kV
V
ESD
ESD Withstand Voltage
V
CC
= 5V; V
RGB
= 3.3V;
V
AUX
= 3.3V; Note 3
±
8
t
PLH
SYNC Buffer L => H
Propagation Delay
C
L
= 50pF; V
CC
= 5.0V;
R
L
= 500
; Note 4
7.0
15.0
ns
t
PHL
SYNC Buffer H => L
Propagation Delay
C
L
= 50pF; V
CC
= 5.0V;
R
L
= 500
; Note 4
7.0
15.0
ns
t
R,
t
F
SYNC Buffer Output Rise & Fall
Times
C
L
= 50pF; V
CC
= 5.0V;
R
L
= 500
; Note 4
7.0
ns
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| PACVGA105Q | 制造商:CALMICRO 功能描述: |
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| PACVGA200 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:VGA Port Companion Circuit |
| PACVGA200Q | 制造商:CALMICRO 功能描述: |
| PACVGA200QR | 功能描述:ESD 抑制器 Circuit w/ 75 ohm R 24-Pin RoHS:否 制造商:STMicroelectronics 通道:8 Channels 擊穿電壓:8 V 電容:45 pF 端接類型:SMD/SMT 封裝 / 箱體:uQFN-16 功率耗散 Pd: 工作溫度范圍:- 40 C to + 85 C |
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