參數(shù)資料
型號： PA28F400B5T80
廠商： INTEL CORP
元件分類： PROM
英文描述： SMART 5 BOOT BLOCK FLASH MEMORY FAMILY 2, 4, 8 MBIT
中文描述： 512K X 8 FLASH 5V PROM, 80 ns, PDSO44
封裝： 0.525 X 1.110 INCH, PLASTIC, SOP-44
文件頁數(shù)： 30/38頁
文件大?。?/td> 501K
代理商： PA28F400B5T80
SMART 5 BOOT BLOCK MEMORY FAMILY
E
30
ADVANCE INFORMATION
C
L
OUT
V
CC
DEVICE
UNDER
TEST
R
1
R
2
0599-12
NOTE:
C
L
includes jig capacitance.
Figure 13. Test Configuration
Test Configuration Component Values
Test Configuration
C
L
(pF)
R
1
(
) R
2
(
)
5 V Standard Test
100
580
390
5 V High-Speed Test
30
580
390
IH
V
IL
V
RP# (P)
PLPH
t
IH
V
IL
V
RP# (P)
PLPH
t
(A) Reset during Read Mode
Abort
Complete
PLRH
PHQV
PHWL
PHEL
t
t
t
PHQV
PHWL
PHEL
t
t
t
(B) Reset during Program or Block Erase, <
PLPH
PLRH
t
t
IH
V
IL
V
RP# (P)
PLPH
t
Abort
Complete
PHQV
PHWL
PHEL
t
t
t
PLRH
t
Deep
Power-
Down
(C) Reset Program or Block Erase, >
PLPH
PLRH
t
0599-13
Figure 14. AC Waveform for Reset Operation
Table 9. Reset Specifications
(1)
Sym
Parameter
Min
Max
Unit
t
PLPH
RP# Pulse Low
Time
60
ns
t
PLRH
RP# Low to Reset
during Prog/Erase
12
μ
s
1.
2.
If RP# is tied to V
CC
, these specs are not applicable.
These specifications are valid for all product versions
(packages and speeds).
If RP# is asserted while a program or block erase, is
not executing, the reset will complete within t
PLPH
.
A reset time, t
, is required after t
until outputs
are valid. See Section 3.1.5 for detailed information.
3.
4.
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