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參數(shù)資料
| 型號(hào)： | P89LPC970FDH,129 |
| 廠商： | NXP Semiconductors |
| 文件頁(yè)數(shù)： | 9/66頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | MCU 80C51 2KB FLASH 20TSSOP |
| 標(biāo)準(zhǔn)包裝： | 75 |
| 系列： | LPC900 |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 18MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 18 |
| 程序存儲(chǔ)器容量： | 2KB（2K x 8） |
| 程序存儲(chǔ)器類(lèi)型： | 閃存 |
| RAM 容量： | 256 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.4 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 包裝： | 管件 |
| 其它名稱(chēng)： | 568-8747-5 P89LPC970FDH,129-ND |
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[1]
BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is logic 0. If any are written while BRGEN = 1, the result is unpredictable.
[2]
All ports are in input only (high-impedance) state after power-up.
[3]
The RSTSRC register reflects the cause of the P89LPC970/971/972 reset except BOIF bit. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the
power-on reset value is x011 0000.
[4]
The only reset sources that affect these SFRs are power-on reset and watchdog reset.
[5]
On power-on reset and watchdog reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.
[6]
After reset, the value is 1110 01x1, i.e., PRE2 to PRE0 are all logic 1, WDRUN = 1 and WDCLK = 1. WDTOF bit is logic 1 after watchdog reset and is logic 0 after power-on reset.
Other resets will not affect WDTOF.
TH4
Timer/Counter 4
high byte
CCH
00
0000 000
0
TL4
Timer/Counter 4
low byte
CBH
00
0000 0000
TINTF
Timer/Counters
2/3/4 overflow
and external
flags
CEH
-
TF4
EXF4
TF3
EXF3
TF2
EXF2
00
0000 000
0
TRIM
Internal
oscillator trim
register
96H
RCCLK
ENCLK
TRIM.5
TRIM.4
TRIM.3
TRIM.2
TRIM.1
TRIM.0
WDCON
Watchdog
control register
A7H
PRE2
PRE1
PRE0
-
WDRUN
WDTOF
WDCLK
WDL
Watchdog load
C1H
FF
1111 1111
WFEED1 Watchdog
feed 1
C2H
WFEED2 Watchdog
feed 2
C3H
Table 4.
Special function registers …continued
* indicates SFRs that are bit addressable.
Name
Description
SFR
addr.
Bit functions and addresses
Reset value
MSB
LSB
Hex
Binary
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| P89LPC971 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB wide-voltage byte-erasable flash |
| P89LPC971FDH | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB wide-voltage byte-erasable flash |
| P89LPC971FDH,129 | 功能描述:8位微控制器 -MCU MCU 80C51 4KB FLASH RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P89LPC971FDH129 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB wide-voltage byte-erasable flash |
| P89LPC972 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB wide-voltage byte-erasable flash |
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