參數(shù)資料
型號: P89LPC938FHN,151
廠商: NXP Semiconductors
文件頁數(shù): 11/68頁
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 8K 28-HVQFN
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 490
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LED,POR,PWM,WDT
輸入/輸出數(shù): 26
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 512 x 8
RAM 容量: 768 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-VQFN 裸露焊盤
包裝: 托盤
配用: 622-1014-ND - BOARD FOR LPC9XX TSSOP
622-1011-ND - BOARD FOR LPC938 TSSOP
622-1008-ND - BOARD FOR LPC9103 10-HVSON
622-1006-ND - SOCKET ADAPTER BOARD
568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
568-1758-ND - BOARD EVAL FOR LPC93X MCU FAMILY
其它名稱: 568-3226
935278544151
P89LPC938FHN-S
9397 750 14051
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 25 February 2005
19 of 68
Philips Semiconductors
P89LPC938
8-bit microcontroller with 10-bit A/D converter
7.2 Enhanced CPU
The P89LPC938 uses an enhanced 80C51 CPU which runs at six times the speed of
standard 80C51 devices. A machine cycle consists of two CPU clock cycles, and most
instructions execute in one or two machine cycles.
7.3 Clocks
7.3.1 Clock denitions
The P89LPC938 device has several internal clocks as dened below:
OSCCLK — Input to the DIVM clock divider. OSCCLK is selected from one of four clock
sources (see Figure 6) and can also be optionally divided to a slower frequency (see
Note: fosc is dened as the OSCCLK frequency.
CCLK — CPU clock; output of the clock divider. There are two CCLK cycles per machine
cycle, and most instructions are executed in one to two machine cycles (two or four CCLK
cycles).
RCCLK — The internal 7.373 MHz RC oscillator output.
PCLK — Clock for the various peripheral devices and is CCLK
2.
7.3.2 CPU clock (OSCCLK)
The P89LPC938 provides several user-selectable oscillator options in generating the CPU
clock. This allows optimization for a range of needs from high precision to lowest possible
cost. These options are congured when the Flash is programmed and include an on-chip
watchdog oscillator, an on-chip RC oscillator, an oscillator using an external crystal, or an
external clock source. The crystal oscillator can be optimized for low, medium, or high
frequency crystals covering a range from 20 kHz to 18 MHz.
7.3.3 Low speed oscillator option
This option supports an external crystal in the range of 20 kHz to 100 kHz. Ceramic
resonators are also supported in this conguration.
7.3.4 Medium speed oscillator option
This option supports an external crystal in the range of 100 kHz to 4 MHz. Ceramic
resonators are also supported in this conguration.
7.3.5 High speed oscillator option
This option supports an external crystal in the range of 4 MHz to 18 MHz. Ceramic
resonators are also supported in this conguration.
7.3.6 Clock output
The P89LPC938 supports a user-selectable clock output function on the XTAL2/CLKOUT
pin when crystal oscillator is not being used. This condition occurs if another clock source
has been selected (on-chip RC oscillator, watchdog oscillator, external clock input on X1)
and if the RTC is not using the crystal oscillator as its clock source. This allows external
devices to synchronize to the P89LPC938. This output is enabled by the ENCLK bit in the
TRIM register.
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