參數(shù)資料
型號(hào): P89LPC935FA
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB 3 V byte-erasable Flash with 8-bit A/D converters
中文描述: 8-BIT, FLASH, 18 MHz, MICROCONTROLLER, PQCC28
封裝: PLASTIC, MS-018, SOT-261-2, LCC-28
文件頁數(shù): 23/75頁
文件大?。?/td> 372K
代理商: P89LPC935FA
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Special function registers - P89LPC935/936
…continued
* indicates SFRs that are bit addressable.
Name
Description
SFR
addr.
MSB
9
P
R
2
P
P
8
[1]
Unimplemented bits in SFRs (labeled ’-’) are X (unknown) at all times. Unless otherwise specified, ones should not be written to these bits since they may be used for other
purposes in future derivatives. The reset values shown for these bits are logic 0s although they are unknown when read.
[2]
All ports are in input only (high-impedance) state after power-up.
[3]
BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is logic 0. If any are written while BRGEN = 1, the result is unpredictable.
[4]
The RSTSRC register reflects the cause of the P89LPC933/934/935/936 reset. Upon a power-up reset, all reset source flags are cleared except POF and BOF; the power-on reset
value is xx11 0000.
[5]
After reset, the value is 1110 01x1, i.e., PRE2 to PRE0 are all logic 1, WDRUN = 1 and WDCLK = 1. WDTOF bit is logic 1 after watchdog reset and is logic 0 after power-on reset.
Other resets will not affect WDTOF.
[6]
On power-on reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.
[7]
The only reset source that affects these SFRs is power-on reset.
TL2
TMOD
TOR2H
TOR2L
TPCR2H
CCU timer low
Timer 0 and 1 mode
CCU reload register high
CCU reload register low
Prescaler control register high
CCH
89H
CFH
CEH
CBH
00
00
00
00
00
0000 0000
0000 0000
0000 0000
0000 0000
xxxx xx00
T1GATE
T1C/T
T1M1
T1M0
T0GATE
T0C/T
T0M1
T0M0
-
-
-
-
-
-
TPCR2H.
1
TPCR2L.
1
TRIM.1
WDTOF
TPCR2H.
0
TPCR2L.
0
TRIM.0
WDCLK
TPCR2L
Prescaler control register low
CAH
TPCR2L.
7
RCCLK
PRE2
TPCR2L.
6
ENCLK
PRE1
TPCR2L.
5
TRIM.5
PRE0
TPCR2L.
4
TRIM.4
-
TPCR2L.
3
TRIM.3
-
TPCR2L.
2
TRIM.2
WDRUN
00
0000 0000
TRIM
WDCON
WDL
WFEED1
WFEED2
Internal oscillator trim register
Watchdog control register
Watchdog load
Watchdog feed 1
Watchdog feed 2
96H
A7H
C1H
C2H
C3H
[6] [5]
[7] [5]
FF
1111 1111
Table 6:
Bit functions and addresses
Reset value
Hex
LSB
Binary
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