參數(shù)資料
型號: P89LPC9351FA,529
廠商: NXP Semiconductors
文件頁數(shù): 27/94頁
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 8K 28-PLCC
標準包裝: 37
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,SPI,UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 26
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 512 x 8
RAM 容量: 768 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 8x8b; D/A 2x8b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-PLCC
包裝: 管件
配用: 568-1758-ND - BOARD EVAL FOR LPC93X MCU FAMILY
其它名稱: 935287627529
P89LPC9331_9341_9351_9361
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 5.1 — 20 August 2012
33 of 94
NXP Semiconductors
P89LPC9331/9341/9351/9361
8-bit microcontroller with accelerated two-clock 80C51 core
7.13 Memory organization
The various P89LPC9331/9341/9351/9361 memory spaces are as follows:
DATA
128 bytes of internal data memory space (00H:7FH) accessed via direct or indirect
addressing, using instructions other than MOVX and MOVC. All or part of the Stack
may be in this area.
IDATA
Indirect Data. 256 bytes of internal data memory space (00H:FFH) accessed via
indirect addressing using instructions other than MOVX and MOVC. All or part of the
Stack may be in this area. This area includes the DATA area and the 128 bytes
immediately above it.
SFR
Special Function Registers. Selected CPU registers and peripheral control and status
registers, accessible only via direct addressing.
XDATA (P89LPC9351/9361)
‘External’ Data or Auxiliary RAM. Duplicates the classic 80C51 64 kB memory space
addressed via the MOVX instruction using the DPTR, R0, or R1. All or part of this
space could be implemented on-chip. The P89LPC9351/9361 has 512 bytes of
on-chip XDATA memory, plus extended SFRs located in XDATA.
CODE
64 kB of Code memory space, accessed as part of program execution and via the
MOVC instruction. The P89LPC9331/9341/9351/9361 has 4 kB/8 kB/16 kB of on-chip
Code memory.
The P89LPC9351/9361 also has 512 bytes of on-chip data EEPROM that is accessed via
SFRs (see Section 7.14).
7.14 Data RAM arrangement
The 768 bytes of on-chip RAM are organized as shown in Table 8.
7.15 Interrupts
The P89LPC9331/9341/9351/9361 uses a four priority level interrupt structure. This
allows great flexibility in controlling the handling of the many interrupt sources. The
P89LPC9331/9341/9351/9361 supports 15 interrupt sources: external interrupts 0 and 1,
timers 0 and 1, serial port TX, serial port RX, combined serial port RX/TX, brownout
detect, watchdog/RTC, I2C-bus, keyboard, comparators 1 and 2, SPI, CCU, data
EEPROM write/ADC completion.
Table 8.
On-chip data memory usages
Type
Data RAM
Size (bytes)
DATA
Memory that can be addressed directly and indirectly
128
IDATA
Memory that can be addressed indirectly
256
XDATA
Auxiliary (External Data) on-chip memory that is accessed
using the MOVX instructions (P89LPC9351/9361)
512
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