參數(shù)資料
型號: P89LPC932A1
廠商: NXP Semiconductors N.V.
英文描述: 8-Bit Microcontroller with accelerated two-clock 80C51 core 8kB 3V byte-erasable flash with 512-byte data EEPROM
中文描述: 8位加速兩個小時的80C51單片機為核心的8kB 3V的字節(jié)可擦除閃存和512字節(jié)的EEPROM數(shù)據(jù)
文件頁數(shù): 9/64頁
文件大?。?/td> 316K
代理商: P89LPC932A1
9397 750 14871
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 10 May 2005
9 of 64
Philips Semiconductors
P89LPC932A1
8-bit microcontroller with accelerated two-clock 80C51 core
P1.0 to P1.7
I/O, I
[1]
Port 1:
Port 1 is an 8-bit I/O port with a user-configurable output type,
except for three pins as noted below. During reset Port 1 latches are
configured in the input only mode with the internal pull-up disabled. The
operation of the configurable Port 1 pins as inputs and outputs depends
upon the port configuration selected. Each of the configurable port pins
are programmed independently. Refer to
Section 7.13.1 “Port
configurations”
and
Table 9 “Static characteristics”
for details. P1.2 and
P1.3 are open drain when used as outputs. P1.5 is input only.
All pins have Schmitt trigger inputs.
Port 1 also provides various special functions as described below:
P1.0 —
Port 1 bit 0.
TXD —
Transmitter output for the serial port.
P1.1 —
Port 1 bit 1.
RXD —
Receiver input for the serial port.
P1.2 —
Port 1 bit 2 (open-drain when used as output).
T0 —
Timer/counter 0 external count input or overflow output (open-drain
when used as output).
SCL —
I
2
C serial clock input/output.
P1.3 —
Port 1 bit 3 (open-drain when used as output).
INT0 —
External interrupt 0 input.
SDA —
I
2
C serial data input/output.
P1.4 —
Port 1 bit 4.
INT1 —
External interrupt 1 input.
P1.5 —
Port 1 bit 5 (input only).
RST —
External Reset input during power-on or if selected via UCFG1.
When functioning as a reset input, a LOW on this pin resets the
microcontroller, causing I/O ports and peripherals to take on their default
states, and the processor begins execution at address 0. Also used during
a power-on sequence to force ISP mode.
When using an oscillator
frequency above 12 MHz, the reset input function of P1.5 must be
enabled. An external circuit is required to hold the device in reset at
power-up until V
DD
has reached its specified level. When system
power is removed V
DD
will fall below the minimum specified
operating voltage. When using an oscillator frequency above
12 MHz, in some applications, an external brownout detect circuit
may be required to hold the device in reset when V
DD
falls below the
minimum specified operating voltage.
P1.6 —
Port 1 bit 6.
OCB —
Output Compare B.
P1.7 —
Port 1 bit 7.
OCC —
Output Compare C.
P1.0/TXD
18
14
I/O
O
I/O
I
I/O
I/O
P1.1/RXD
17
13
P1.2/T0/SCL
12
8
I/O
I/O
I
I/O
I
I
I
I
P1.3/INT0/
SDA
11
7
P1.4/INT1
10
6
P1.5/RST
6
2
P1.6/OCB
5
1
I/O
O
I/O
O
P1.7/OCC
4
28
Table 3:
Symbol
Pin description
…continued
Pin
TSSOP28,
PLCC28
Type Description
HVQFN28
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P89LPC932A1FDH 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM
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