參數(shù)資料
型號: P89LPC9171FDH,129
廠商: NXP Semiconductors
文件頁數(shù): 17/27頁
文件大小: 0K
描述: IC 80C51 MCU FLASH 2KB 16TSSOP
標(biāo)準(zhǔn)包裝: 96
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 14
程序存儲器容量: 2KB(2K x 8)
程序存儲器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b; D/A 1x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
包裝: 管件
其它名稱: 935290262129
2010 Microchip Technology Inc.
Preliminary
DS39979A-page 81
PIC18F87J72 FAMILY
7.3
Reading the Flash Program
Memory
The TBLRD instruction is used to retrieve data from
program memory and places it into data RAM. Table
reads from program memory are performed one byte at
a time.
TBLPTR points to a byte address in program space.
Executing TBLRD places the byte pointed to into
TABLAT. In addition, TBLPTR can be modified
automatically for the next table read operation.
The internal program memory is typically organized by
words. The Least Significant bit of the address selects
between the high and low bytes of the word. Figure 7-4
shows the interface between the internal program
memory and the TABLAT.
FIGURE 7-4:
READS FROM FLASH PROGRAM MEMORY
EXAMPLE 7-1:
READING A FLASH PROGRAM MEMORY WORD
(Even Byte Address)
Program Memory
(Odd Byte Address)
TBLRD
TABLAT
TBLPTR = xxxxx1
FETCH
Instruction Register
(IR)
Read Register
TBLPTR = xxxxx0
MOVLWCODE_ADDR_UPPER
; Load TBLPTR with the base
MOVWFTBLPTRU
; address of the word
MOVLWCODE_ADDR_HIGH
MOVWFTBLPTRH
MOVLWCODE_ADDR_LOW
MOVWFTBLPTRL
READ_WORD
TBLRD*+
; read into TABLAT and increment
MOVF TABLAT, W
; get data
MOVWFWORD_EVEN
TBLRD*+
; read into TABLAT and increment
MOVF TABLAT, W
; get data
MOVWFWORD_ODD
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