參數(shù)資料
型號(hào): P89LPC914FDH
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM
中文描述: 8-BIT, FLASH, 12 MHz, MICROCONTROLLER, PDSO14
封裝: 4.4 MM, PLASTIC, MO-153, SOT-402-1, TSSOP-14
文件頁數(shù): 33/63頁
文件大小: 314K
代理商: P89LPC914FDH
Philips Semiconductors
P89LPC912/913/914
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 03 — 17 December 2004
33 of 63
9397 750 14468
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
A quasi-bidirectional port pin has a Schmitt-triggered input that also has a glitch
suppression circuit.
9.11.3
Open-drain output configuration
The open-drain output configuration turns off all pull-ups and only drives the
pull-down transistor of the port driver when the port latch contains a logic ‘0’. To be
used as a logic output, a port configured in this manner must have an external
pull-up, typically a resistor tied to V
DD
.
An open-drain port pin has a Schmitt-triggered input that also has a glitch
suppression circuit.
9.11.4
Input-only configuration
The input-only port configuration has no output drivers. It is a Schmitt-triggered input
that also has a glitch suppression circuit.
9.11.5
Push-pull output configuration
The push-pull output configuration has the same pull-down structure as both the
open-drain and the quasi-bidirectional output modes, but provides a continuous
strong pull-up when the port latch contains a logic ‘1’. The push-pull mode may be
used when more source current is needed from a port output. A push-pull port pin
has a Schmitt-triggered input that also has a glitch suppression circuit.
9.11.6
Port 0 analog functions
The P89LPC912/913/914 incorporates two Analog Comparators. In order to give the
best analog function performance and to minimize power consumption, pins that are
being used for analog functions must have the digital outputs and digital inputs
disabled.
Digital outputs are disabled by putting the port output into the Input-Only (high
impedance) mode as described in
Section 9.11.4 “Input-only configuration”
.
Digital inputs on Port 0 may be disabled through the use of the PT0AD register. On
any reset, the PT0AD bits default to ‘0’s to enable digital functions.
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