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參數(shù)資料
| 型號： | P89C662HBA |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 80C51 8-bit Flash microcontroller family |
| 中文描述： | 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, MS-018, SOT-187-2, LCC-44 |
| 文件頁數(shù)： | 61/89頁 |
| 文件大小： | 491K |
| 代理商： | P89C662HBA |
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Philips Semiconductors
Product data
P89C660/P89C662/P89C664/
P89C668
80C51 8-bit Flash microcontroller family
16KB/32KB/64KB ISP/IAP Flash with 512B/1KB/2KB/8KB RAM
2002 Oct 28
61
Expanded Data RAM Addressing
The P89C660/662/664/668 has internal data memory that is
mapped into four separate segments: the lower 128 bytes of RAM,
upper 128 bytes of RAM, 128 bytes Special Function Register (SFR),
and 256 bytes expanded RAM (ERAM) (256 bytes for the ’660; 768
bytes for the ’662; 1792 bytes for the ’664; 7936 bytes for the ’668).
The four segments are:
1. The Lower 128 bytes of RAM (addresses 00H to 7FH) are
directly and indirectly addressable.
2. The Upper 128 bytes of RAM (addresses 80H to FFH) are
indirectly addressable only.
3. The Special Function Registers, SFRs, (addresses 80H to FFH)
are directly addressable only.
4. The 256/768/1792/7936-bytes expanded RAM (ERAM,
00H – XFFH/2FFH/6FFH/1FFFH) are indirectly accessed by
move external instruction, MOVX, and with the EXTRAM bit
cleared, see Figure 53.
The Lower 128 bytes can be accessed by either direct or indirect
addressing. The Upper 128 bytes can be accessed by indirect
addressing only. The Upper 128 bytes occupy the same address
space as the SFR. That means they have the same address, but are
physically separate from SFR space.
When an instruction accesses an internal location above address
7FH, the CPU knows whether the access is to the upper 128 bytes
of data RAM, or to SFR space by the addressing mode used in the
instruction. Instructions that use direct addressing, access SFR
space. For example:
MOV 0A0H,A
accesses the SFR at location 0A0H (which is P2). Instructions that
use indirect addressing, access the Upper 128 bytes of data RAM.
For example:
MOV @R0,A
where R0 contains 0A0H, accesses the data byte at address 0A0H,
rather than P2 (whose address is 0A0H).
The ERAM can be accessed by indirect addressing, with EXTRAM
bit cleared and MOVX instructions. This part of memory is physically
located on-chip, logically occupies the first 256 bytes (660), 768
(662), 1792 (664), 7936 (668) of external data memory.
With EXTRAM = 0, the ERAM is indirectly addressed, using the
MOVX instruction in combination with any of the registers R0, R1 of
the selected bank or DPTR. An access to ERAM will not affect ports
P0, P3.6 (WR#) and P3.7 (RD#). P2 SFR is in output state during
external addressing. For example, with EXTRAM = 0,
MOVX @R0,A
where R0 contains 0A0H, access the ERAM at address 0A0H rather
than external memory. An access to external data memory locations
higher than the ERAM will be performed with the MOVX DPTR
instructions in the same way as in the standard 80C51 (with P0 and
P2 as data/address bus, and P3.6 and P3.7 as write and read timing
signals. Refer to Figure 54).
With EXTRAM = 1, MOVX @Ri and MOVX @DPTR will be similar
to the standard 80C51. MOVX @ Ri will provide an 8-bit address
multiplexed with data on Port 0 and any output port pins can be
used to output higher order address bits. This is to provide the
external paging capability. MOVX @DPTR will generate a 16-bit
address. Port 2 outputs the high-order eight address bits (the
contents of DPH) while Port 0 multiplexes the low-order eight
address bits (the contents of DPL) with data. MOVX @Ri and MOVX
@DPTR will generate either read or write signals on P3.6 (WR) and
P3.7 (RD).
The stack pointer (SP) may be located anywhere in the 256 bytes
RAM (lower and upper RAM) internal data memory. The stack may
not be located in the ERAM.
AUXR
Reset Value = xxxx xx10B
—
—
—
—
—
—
EXTRAM
AO
Not Bit Addressable
Bit:
Symbol
Function
AO
Disable/Enable ALE
AO
0
1
Internal/External RAM access using MOVX @Ri/@DPTR
EXTRAM
Operating Mode
0
Internal ERAM access using MOVX @Ri/@DPTR
1
External data memory access.
Not implemented, reserved for future use*.
Operating Mode
ALE is emitted at a constant rate of
1
/
3
the oscillator frequency (6 clock mode;
1
/
6
f
OSC
in 12 clock mode)
ALE is active only during off-chip memory access.
EXTRAM
—
NOTE:
*User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new features. In that case, the reset or inactive value of the new
bit will be 0, and its active value will be 1. The value read from a reserved bit is indeterminate.
SU01711
7
6
5
4
3
2
1
0
Address = 8EH
Figure 53. AUXR: Auxiliary Register
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| P89C662HBBD | 80C51 8-bit Flash microcontroller family |
| P89C664HBA | 80C51 8-bit Flash microcontroller family |
| P89C664HBBD | 80C51 8-bit Flash microcontroller family |
| P89C662 | 80C51 8-Bit Flash Microcontroller 32KB ISP/IAP FLASH with 1KB RAM(80C51 8位閃速微控制器，帶16KB ISP/IAP閃速存儲器和1KB RAM) |
| P89C668HBA | 80C51 8-bit Flash microcontroller family 64KB ISP FLASH with 8KB RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P89C662HBA/00,512 | 功能描述:IC 80C51 MCU FLASH 32K 44-PLCC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:89C 產(chǎn)品培訓(xùn)模塊:MCU Product Line Introduction XMEGA Introduction AVR XMEGA USB Connectivity 標(biāo)準(zhǔn)包裝:90 系列:AVR® XMEGA 核心處理器:AVR 芯體尺寸:8/16-位 速度:32MHz 連通性:I²C，IrDA，SPI，UART/USART 外圍設(shè)備:欠壓檢測/復(fù)位，DMA，POR，PWM，WDT 輸入/輸出數(shù):50 程序存儲器容量:192KB（96K x 16） 程序存儲器類型:閃存 EEPROM 大小:4K x 8 RAM 容量:16K x 8 電壓 - 電源 (Vcc/Vdd):1.6 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 16x12b; D/A 2x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:64-TQFP 包裝:托盤 配用:ATSTK600-RC14-ND - STK600 SOCKET/ADAPTER 64TQFPATSTK600-TQFP64-ND - STK600 SOCKET/ADAPTER 64-TQFPATAVRONEKIT-ND - KIT AVR/AVR32 DEBUGGER/PROGRMMRATAVRISP2-ND - PROGRAMMER AVR IN SYSTEM |
| P89C662HBBD | 制造商: 功能描述: 制造商:undefined 功能描述: |
| P89C662HBBD/00,557 | 制造商:NXP Semiconductors 功能描述: |
| P89C662HFA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit Flash microcontroller family |
| P89C662HFA/00,512 | 功能描述:8位微控制器 -MCU 32K/1K FL 6 CLK ISP/IAP IND RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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