參數(shù)資料
型號： P89C51X2BA
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 80C51 8-bit Flash microcontroller family
中文描述： 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 45/68頁
文件大小： 404K
代理商： P89C51X2BA
Philips Semiconductors
Preliminary data
P89C51RA2/RB2/RC2/RD2xx
80C51 8-bit Flash microcontroller family
8KB/16KB/32KB/64KB ISP/IAP Flash with 512B/512B/512B/1KB RAM
2002 Jul 18
45
BootROM that is shadowed over a portion of the user code memory
space. A user program simply calls the common entry point with
appropriate parameters in the BootROM to accomplish the desired
operation. BootROM operations include: erase block, program byte,
verify byte, program security bit, etc. The BootROM overlays the
program memory space at the top of the address space from FC00
to FFFF hex, when it is enabled. The BootROM may be turned off so
that the upper 1 kbyte of user program memory is accessible for
execution.
Clock Mode
The clock mode feature sets operating frequency to be 1/12 or 1/6 of
the oscillator frequency. The clock mode configuration bit, FX2, is
located in the Security Block (See Table 8). FX2, when programmed,
will override the SFR clock mode bit (X2) in the CKCON register. If
FX2 is erased, then the SFR bit (X2) may be used to select between
6-clock and 12-clock mode.
Table 8.
CLOCK MODE CONFIG BIT (FX2)
erased
erased
programmed
X2 bit in CKCON
0
1
x
DESCRIPTION
12-clock mode (default)
6-clock mode
6-clock mode
NOTE:
1. Default clock mode after ChipErase is set to SFR selection.
FLASH MEMORY SPACES
Flash User Code Memory Organization
FFFF
C000
8000
4000
2000
0000
PROGRAM
ADDRESS
BOOT ROM
(1 kB)
FFFF
FC00
SU01614
89C51RD2xx
89C51RC2xx
89C51RB2xx
89C51RA2xx
BLOCK 1
BLOCK 0
BLOCK 3
BLOCK 2
BLOCK 5
BLOCK 4
BLOCK 7
BLOCK 6
BLOCK 9
BLOCK 8
BLOCK 11
BLOCK 10
BLOCK 13
BLOCK 12
BLOCK 15
BLOCK 14
Each block is
4 kbytes in size
Figure 40. Flash Memory Configurations
Power-On Reset Code Execution
The P89C51RA2/RB2/RC2/RD2xx contains two special Flash
registers: the BOOT VECTOR and the STATUS BYTE. At the falling
edge of reset, the P89C51RA2/RB2/RC2/RD2xx examines the
contents of the Status Byte. If the Status Byte is set to zero,
power-up execution starts at location 0000H, which is the normal
start address of the user’s application code. When the Status Byte is
set to a value other than zero, the contents of the Boot Vector is
used as the high byte of the execution address and the low byte is
set to 00H. The factory default setting is 0FCH, corresponds to the
address 0FC00H for the factory masked-ROM ISP boot loader. A
custom boot loader can be written with the Boot Vector set to the
custom boot loader.
NOTE:
bytes are erased at the same time. It is necessary to reprogram
the Boot Vector after erasing and updating the Status Byte.
When erasing the Status Byte or Boot Vector, both
相關(guān)PDF資料
PDF描述
P89C51X2BBD 80C51 8-bit Flash microcontroller family
P89C51X2BN 80C51 8-bit Flash microcontroller family
P89C51X2FA 80C51 8-bit Flash microcontroller family
P89C51UBBB 80C51 8-bit microcontroller family 4K/8K/16K/32K Flash
P89C51RC2 80C51 8-bit Flash microcontroller family
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
P89C51X2BBD 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit Flash microcontroller family
P89C51X2BN 制造商:NXP Semiconductors 功能描述:
P89C51X2BN/00,112 功能描述:8位微控制器 -MCU 4K/128 FL 12/6 CLK COMM DIP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
P89C51X2FA 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit Flash microcontroller family
P89C52 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller family 4K/8K/16K/32K Flash
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